Issued Patents All Time
Showing 151–175 of 296 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9935119 | Dual control gate spacer structure for embedded flash memory | Yuan-Tai Tseng, Chang-Ming Wu | 2018-04-03 |
| 9917165 | Memory cell structure for improving erase speed | Chang-Ming Wu | 2018-03-13 |
| 9911734 | Semiconductor device containing HEMT and MISFET and method of forming the same | Chung-Yen Chou, Sheng-De Liu, Fu-Chih Yang, Chia-Shiung Tsai | 2018-03-06 |
| 9878899 | Method and apparatus for reducing in-process and in-use stiction for MEMS devices | Lee-Chuan Tseng, Chang-Ming Wu, Yuan-Chih Hsieh | 2018-01-30 |
| 9876169 | RRAM devices and methods | Fu-Ting Sung, Chung-Yen Chou | 2018-01-23 |
| 9865610 | Si recess method in HKMG replacement gate technology | Harry-Hak-Lay Chuang, Wei-Cheng Wu, Chin-Yi Huang, Chang-Ming Wu | 2018-01-09 |
| 9859295 | Method for forming flash memory structure | Fu-Ting Sung, Chung-Chiang Min, Wei-Hang Huang, Chia-Shiung Tsai | 2018-01-02 |
| 9853091 | Side bottom contact RRAM structure | Chung-Yen Chou, Ching-Pei Hsieh, Chia-Shiung Tsai | 2017-12-26 |
| 9847473 | MRAM structure for process damage minimization | Chern-Yow Hsu | 2017-12-19 |
| 9837606 | Resistance variable memory structure and method of forming the same | Fu-Ting Sung, Ching-Pei Hsieh, Chia-Shiung Tsai, Chern-Yow Hsu | 2017-12-05 |
| 9837322 | Semiconductor arrangement and method of forming | Harry-Hak-Lay Chuang, Wei-Cheng Wu, Chin-Yi Huang | 2017-12-05 |
| 9837421 | Semiconductor arrangement having capacitor separated from active region | Chern-Yow Hsu, Cheng-Jong Wang, Chia-Shiung Tsai, Xiaomeng Chen | 2017-12-05 |
| 9837605 | Memory cell having resistance variable film and method of making the same | Ching-Pei Hsieh, Fu-Ting Sung, Chern-Yow Hsu, Chia-Shiung Tsai | 2017-12-05 |
| 9825224 | RRAM device | Ching-Pei Hsieh, Chung-Yen Chou | 2017-11-21 |
| 9825040 | Semiconductor arrangement with capacitor and method of fabricating the same | Chern-Yow Hsu, Ming Chyi Liu, Chia-Shiung Tsai, Xiaomeng Chen, Chen-Jong Wang | 2017-11-21 |
| 9818935 | Techniques for MRAM MTJ top electrode connection | Harry-Hak-Lay Chuang, Chern-Yow Hsu | 2017-11-14 |
| 9806254 | Storage device with composite spacer and method for manufacturing the same | Fu-Ting Sung, Chern-Yow Hsu | 2017-10-31 |
| 9799665 | Method for forming semiconductor device structure | Chang-Ming Wu, Tsung-Hsueh Yang, Chung-Chiang Min | 2017-10-24 |
| 9793339 | Method for preventing copper contamination in metal-insulator-metal (MIM) capacitors | Ching-Sheng Chu, Chern-Yow Hsu | 2017-10-17 |
| 9786674 | Discrete storage element formation for thin-film storage device | Chung-Chiang Min, Chang-Ming Wu, Yuan-Tai Tseng | 2017-10-10 |
| 9768220 | Deep trench isolation structure for image sensors | Yuan-Tai Tseng, Yu-Hsing Chang, Ming Chyi Liu, Chia-Shiung Tsai | 2017-09-19 |
| 9748255 | Split gate memory devices and methods of manufacturing | Chang-Ming Wu, Chia-Shiung Tsai, Ru-Liang Lee | 2017-08-29 |
| 9741728 | Method for forming a split-gate flash memory cell device with a low power logic device | Harry-Hak-Lay Chuang, Chang-Ming Wu | 2017-08-22 |
| 9741868 | Self-aligned split gate flash memory | Yuan-Tai Tseng, Chang-Ming Wu | 2017-08-22 |
| 9735245 | Recessed salicide structure to integrate a flash memory device with a high κ, metal gate logic device | Harry-Hak-Lay Chuang, Wei-Cheng Wu, Ya-Chen Kao | 2017-08-15 |