Issued Patents All Time
Showing 51–75 of 187 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 11574865 | Method of forming semiconductor device including deep vias | Ta-Pen Guo, Chien-Ying Chen, Li-Chun Tien | 2023-02-07 |
| 11574110 | Method of forming an integrated circuit | Jung-Chan Yang, Ting-Wei Chiang, Jerry Chang Jui Kao, Hui-Zhong Zhuang, Li-Chun Tien +3 more | 2023-02-07 |
| 11574107 | Method for manufacturing a cell having pins and semiconductor device based on same | Pin-Dai Sue, Po-Hsiang Huang, Fong-Yuan Chang, Chi-Yu Lu, Sheng-Hsiung Chen +4 more | 2023-02-07 |
| 11562946 | Memory macro including through-silicon via | Hidehiro Fujiwara, Tze-Chiang Huang, Hong-Chen Cheng, Yen-Huei Chen, Hung-Jen Liao +2 more | 2023-01-24 |
| 11552068 | Integrated circuit and method of generating integrated circuit layout | Fong-Yuan Chang, Kuo-Nan Yang, Chung-Hsing Wang, Sheng-Fong Chen, Po-Hsiang Huang +3 more | 2023-01-10 |
| RE49331 | Masks formed based on integrated circuit layout design having cell that includes extended active region | Li-Chun Tien, Hui-Zhong Zhuang, Chang-Yu Wu | 2022-12-13 |
| 11527518 | Heat dissipation in semiconductor packages and methods of forming same | Fong-Yuan Chang, Po-Hsiang Huang, Jyh Chwen Frank Lee, Yii-Chian Lu, Yu-Hao Chen +1 more | 2022-12-13 |
| 11509306 | Flip-flop device and method of operating flip-flop device | Greg Gruber, Chi-Lin Liu, Ming-Chang Kuo, Shang-Chih Hsieh | 2022-11-22 |
| 11495619 | Integrated circuit device with improved layout | Fong-Yuan Chang, Chun-Chen Chen, Po-Hsiang Huang, Chung-Te Lin, Jerry Chang Jui Kao +2 more | 2022-11-08 |
| 11461528 | Integrated circuit, system for and method of forming an integrated circuit | Jung-Chan Yang, Ting-Wei Chiang, Jerry Chang Jui Kao, Hui-Zhong Zhuang, Li-Chun Tien +3 more | 2022-10-04 |
| 11456728 | Data retention circuit and method | Kai-Chi Huang, Yung-Chen Chien, Chi-Lin Liu, Wei-Hsiang Ma, Jerry Chang Jui Kao +1 more | 2022-09-27 |
| 11437319 | Integrated circuit having a high cell density | Sheng-Hsiung Chen, Chung-Hsing Wang, Fong-Yuan Chang, Li-Chun Tien, Po-Hsiang Huang +6 more | 2022-09-06 |
| 11362660 | Level shifter circuit and method of operating the same | Yu-Lun Ou, Ji-Yung LIN, Yung-Chen Chien, Ruei-Wun SUN, Wei-Hsiang Ma +2 more | 2022-06-14 |
| 11355488 | Integrated circuit layout method, device, and system | Chien-Ying Chen, Li-Chun Tien, Ta-Pen Guo | 2022-06-07 |
| 11281836 | Cell structures and semiconductor devices having same | Fong-Yuan Chang, Jyun-Hao Chang, Sheng-Hsiung Chen, Ho Che Yu, Ni-Wan Fan +3 more | 2022-03-22 |
| 11177256 | Odd-fin height cell regions, semiconductor device having the same, and method of generating a layout diagram corresponding to the same | Hui-Zhong Zhuang, Ting-Wei Chiang, Chung-Te Lin, Li-Chun Tien, Ting Yu Chen | 2021-11-16 |
| 11151297 | Multiple fin count layout, method, system, and device | Po-Chia Lai, Ming-Chang Kuo, Jerry Chang Jui Kao, Wei Ling Chang, Wei-Ren Chen +2 more | 2021-10-19 |
| 11152923 | Flip flop circuit and method of operating the same | Chi-Lin Liu, Shang-Chih Hsieh, Chang-Yu Wu | 2021-10-19 |
| 11127673 | Semiconductor device including deep vias, and method of generating layout diagram for same | Ta-Pen Guo, Li-Chun Tien, Chien-Ying Chen | 2021-09-21 |
| 11063045 | Semiconductor device and method of manufacturing the same | Guo-Huei Wu, Jerry Chang Jui Kao, Chih-Liang Chen, Hui-Zhong Zhuang, Jung-Chan Yang +1 more | 2021-07-13 |
| 11050423 | Flip-flop device and method of operating flip-flop device | Greg Gruber, Chi-Lin Liu, Ming-Chang Kuo, Shang-Chih Hsieh | 2021-06-29 |
| 11050415 | Flip-flop with delineated layout for reduced footprint | Chi-Lin Liu, Ting-Wei Chiang, Jerry Chang Jui Kao, Hui-Zhong Zhuang, Shang-Chih Hsieh +1 more | 2021-06-29 |
| 11037957 | Semiconductor structure | Hsueh-Chih Chou, Chia Hao Tu, Sang Hoo Dhong, Li-Chun Tien, Ting-Wei Chiang +1 more | 2021-06-15 |
| 11037920 | Pin modification for standard cells | Fong-Yuan Chang, Sheng-Hsiung Chen, Ting-Wei Chiang, Chung-Te Lin, Jung-Chan Yang +2 more | 2021-06-15 |
| 11030372 | Method for generating layout diagram including cell having pin patterns and semiconductor device based on same | Pin-Dai Sue, Chin-Chou Liu, Sheng-Hsiung Chen, Fong-Yuan Chang, Yen-Hung Lin +4 more | 2021-06-08 |