Issued Patents All Time
Showing 1–25 of 107 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12430487 | Semiconductor device including standard cell having split portions | Chien-Ying Chen | 2025-09-30 |
| 12406126 | Semiconductor device including standard cells with combined active region | Guru Prasad | 2025-09-02 |
| 12243867 | Integrated circuit device and method | Chien-Ying Chen, Lee-Chung Lu, Li-Chun Tien | 2025-03-04 |
| 12211851 | Semiconductor device including standard cells | Lee-Chung Lu, Li-Chun Tien | 2025-01-28 |
| 12211791 | Semiconductor device including deep vias | Chien-Ying Chen, Li-Chun Tien, Lee-Chung Lu | 2025-01-28 |
| 12094880 | Integrated circuits and manufacturing methods thereof | Ali Keshavarzi, Shu-Hui Sung, Hsiang-Jen Tseng, Shyue-Shyh Lin, Lee-Chung Lu +6 more | 2024-09-17 |
| 12063041 | Flip flop standard cell | Nick Samra, Stefan Rusu | 2024-08-13 |
| 12039245 | Semiconductor device including standard cell having split portions | Chien-Ying Chen | 2024-07-16 |
| 11935893 | Semiconductor device including standard cells | Lee-Chung Lu, Li-Chun Tien | 2024-03-19 |
| 11854966 | Method of forming semiconductor device including deep vias | Chien-Ying Chen, Li-Chun Tien, Lee-Chung Lu | 2023-12-26 |
| 11824541 | Flip flop standard cell | Nick Samra, Stefan Rusu | 2023-11-21 |
| 11803682 | Semiconductor device including standard cell having split portions | Chien-Ying Chen | 2023-10-31 |
| 11776949 | Integrated circuit device and method | Chien-Ying Chen, Lee-Chung Lu, Li-Chun Tien | 2023-10-03 |
| 11709985 | Semiconductor device including standard cells with combined active region | Guru Prasad | 2023-07-25 |
| 11621703 | Cell of transmission gate free circuit and integrated circuit layout including the same | Chi-Lin Liu, Shang-Chih Hsieh, Jerry Chang Jui Kao, Li-Chun Tien, Lee-Chung Lu | 2023-04-04 |
| 11581314 | Integrated circuits and manufacturing methods thereof | Ali Keshavarzi, Shu-Hui Sung, Hsiang-Jen Tseng, Shyue-Shyh Lin, Lee-Chung Lu +6 more | 2023-02-14 |
| 11574865 | Method of forming semiconductor device including deep vias | Chien-Ying Chen, Li-Chun Tien, Lee-Chung Lu | 2023-02-07 |
| 11557532 | Monolithic 3D integration inter-tier vias insertion scheme and associated layout structure | Carlos H. Diaz, Jean-Pierre Colinge, Yi-Hsiung Lin | 2023-01-17 |
| 11532705 | 3D cross-bar nonvolatile memory | Jean-Pierre Colinge, Carlos H. Diaz | 2022-12-20 |
| 11437982 | Flip flop standard cell | Nick Samra, Stefan Rusu | 2022-09-06 |
| 11355488 | Integrated circuit layout method, device, and system | Chien-Ying Chen, Lee-Chung Lu, Li-Chun Tien | 2022-06-07 |
| 11195763 | Method of manufacturing a semiconductor device and a semiconductor device | Hung-Li Chiang, Chao-Ching Cheng, Chih-Liang Chen, Tzu-Chiang Chen, Yu-Lin Yang +2 more | 2021-12-07 |
| 11177179 | Method of manufacturing a semiconductor device and a semiconductor device | Hung-Li Chiang, Chao-Ching Cheng, Chih-Liang Chen, Tzu-Chiang Chen, Yu-Lin Yang +2 more | 2021-11-16 |
| 11127673 | Semiconductor device including deep vias, and method of generating layout diagram for same | Li-Chun Tien, Chien-Ying Chen, Lee-Chung Lu | 2021-09-21 |
| 11127734 | Vertical nanowire transistor for input/output structure | Jean-Pierre Colinge, Carlos H. Diaz | 2021-09-21 |