Issued Patents All Time
Showing 101–125 of 230 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10651832 | Level shifter | Chien-Yuan Chen, Cheng Hung Lee, Hau-Tai Shieh | 2020-05-12 |
| 10559333 | Memory macro and method of operating the same | Chien-Kuo Su, Cheng Hung Lee, Chiting Cheng, Jonathan Tsung-Yung Chang, Yen-Huei Chen +2 more | 2020-02-11 |
| 10541007 | Memory device with strap cells | Jonathan Tsung-Yung Chang, Cheng Hung Lee, Chi-Ting Cheng, Jhon Jhy Liaw, Yen-Huei Chen | 2020-01-21 |
| 10529415 | Write assist for a memory device and methods of forming the same | Sahil Preet Singh, Yen-Huei Chen | 2020-01-07 |
| 10510380 | Power switch control for dual power supply | Fu-An Wu, Cheng Hung Lee, Chen-Lin Yang, Jonathan Tsung-Yung Chang, Yu-Hao Hsu | 2019-12-17 |
| 10510401 | Semiconductor memory device using shared data line for read/write operation | Chien-Yuan Chen, Che-Ju Yeh, Hau-Tai Shieh, Cheng Hung Lee, Sahil Preet Singh +3 more | 2019-12-17 |
| 10510403 | Memory read stability enhancement with short segmented bit line architecture | Mahmut Sinangil, Hidehiro Fujiwara, Jonathan Tsung-Yung Chang, Yen-Huei Chen, Sahil Preet Singh | 2019-12-17 |
| 10503421 | Configurable memory storage system | Yu-Hao Hsu, Cheng Hung Lee, Chen-Lin Yang, Chiting Cheng, Fu-An Wu +6 more | 2019-12-10 |
| 10431295 | Static random access memory and method of controlling the same | Li-Wen Wang, Chih-Yu Lin, Yen-Huei Chen | 2019-10-01 |
| 10410715 | Pre-charging bit lines through charge-sharing | Mahmut Sinangil, Chiting Cheng, Tsung-Yung Chang | 2019-09-10 |
| 10411019 | SRAM cell word line structure with reduced RC effects | Hidehiro Fujiwara, Wei Min Chan, Chih-Yu Lin, Yen-Huei Chen | 2019-09-10 |
| 10373964 | Method of writing to memory circuit using resistive device | Yen-Huei Chen, Chih-Yu Lin, Jonathan Tsung-Yung Chang, Wei-Cheng Wu | 2019-08-06 |
| 10354952 | Memory cell having multi-level word line | Hidehiro Fujiwara, Li-Wen Wang, Yen-Huei Chen | 2019-07-16 |
| 10319421 | Memory macro and method of operating the same | Chien-Kuo Su, Cheng Hung Lee, Chiting Cheng, Jonathan Tsung-Yung Chang, Yen-Huei Chen +2 more | 2019-06-11 |
| 10319435 | Write assist for a memory device and methods of forming the same | Sahil Preet Singh, Yen-Huei Chen | 2019-06-11 |
| 10304500 | Power switch control for dual power supply | Fu-An Wu, Cheng Hung Lee, Chen-Lin Yang, Jonathan Tsung-Yung Chang, Yu-Hao Hsu | 2019-05-28 |
| 10276231 | SRAM cell for interleaved wordline scheme | Hidehiro Fujiwara, Hsien-Yu Pan, Yen-Huei Chen, Mahmut Sinangil | 2019-04-30 |
| 10276579 | Layout design for manufacturing a memory cell | Hidehiro Fujiwara, Hsien-Yu Pan, Yen-Huei Chen | 2019-04-30 |
| 10275561 | Method for eliminating false paths of a circuit unit to be implemented using a system | Chun-Jiun Dai, Wei Min Chan, Yen-Huei Chen | 2019-04-30 |
| 10268787 | Hybrid timing analysis method and associated system and non-transitory computer readable medium | Chun-Jiun Dai, Wei Min Chan, Yen-Huei Chen, Jonathan Tsung-Yung Chang | 2019-04-23 |
| 10204660 | Memory device with strap cells | Jonathan Tsung-Yung Chang, Cheng Hung Lee, Chi-Ting Cheng, Jhon Jhy Liaw, Yen-Huei Chen | 2019-02-12 |
| 10176864 | Static random access memory circuits | Wei-Cheng Wu, Wei Min Chan, Yen-Huei Chen, Ping-Wei Wang | 2019-01-08 |
| 10170487 | Device having an inter-layer via (ILV), and method of making same | Tsung-Hsien Huang, Hong-Chen Cheng, Cheng Hung Lee | 2019-01-01 |
| 10163491 | Memory circuit having shared word line | Hidehiro Fujiwara, Li-Wen Wang, Yen-Huei Chen | 2018-12-25 |
| 10153038 | Memory read stability enhancement with short segmented bit line architecture | Mahmut Sinangil, Hidehiro Fujiwara, Jonathan Tsung-Yung Chang, Yen-Huei Chen, Sahil Preet Singh | 2018-12-11 |