Issued Patents All Time
Showing 51–75 of 159 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 7589387 | SONOS type two-bit FinFET flash memory cell | Jiunn-Ren Hwang, Min-hwa Chi | 2009-09-15 |
| 7585711 | Semiconductor-on-insulator (SOI) strained active area transistor | Hao Chen | 2009-09-08 |
| 7582947 | High performance device design | Chien-Chao Huang | 2009-09-01 |
| 7573095 | Memory cells with improved program/erase windows | Tzyh-Cheang Lee | 2009-08-11 |
| 7545006 | CMOS devices with graded silicide regions | Hung-Ming Chen, Chien-Chao Huang | 2009-06-09 |
| 7485929 | Semiconductor-on-insulator (SOI) strained active areas | Hao Chen | 2009-02-03 |
| 7482231 | Manufacturing of memory array and periphery | Tzyh-Cheang Lee, Jiunn-Ren Hwang, Tsung-Lin Lee | 2009-01-27 |
| 7482236 | Structure and method for a sidewall SONOS memory device | Tzyh-Cheang Lee, Jiunn-Ren Hwang, Tsung-Lin Lee | 2009-01-27 |
| 7462554 | Method for forming semiconductor device with modified channel compressive stress | Chien-Chao Huang, Tone-Xuan Chung, Cheng-Chuan Huang | 2008-12-09 |
| 7452778 | Semiconductor nano-wire devices and methods of fabrication | Hung-Wei Chen, Yee-Chia Yeo, Di-Hong Lee, Chenming Hu | 2008-11-18 |
| 7429769 | Recessed channel field effect transistor (FET) device | Carlos H. Diaz, Yi-Ming Sheu, Syun-Ming Jang, Hun-Jan Tao | 2008-09-30 |
| 7423323 | Semiconductor device with raised segment | Hao Chen, Yee-Chia Yeo, Chenming Hu | 2008-09-09 |
| 7405119 | Structure and method for a sidewall SONOS memory device | Tzyh-Cheang Lee, Jiunn-Ren Hwang, Tsung-Lin Lee | 2008-07-29 |
| 7381649 | Structure for a multiple-gate FET device and a method for its fabrication | Hung-Wei Chen, Tang-Xuan Zhong, Sheng-Da Liu, Chang-Yun Chang, Ping-Kun Wu +1 more | 2008-06-03 |
| 7382023 | Fully depleted SOI multiple threshold voltage application | Hao Chen, Chang-Yun Chang, Di-Hong Lee | 2008-06-03 |
| 7368334 | Silicon-on-insulator chip with multiple crystal orientations | Yee-Chia Yeo | 2008-05-06 |
| 7361541 | Programming optical device | Chien-Chao Huang | 2008-04-22 |
| 7357838 | Relaxed silicon germanium substrate with low defect density | Chun-Chieh Lin, Yee-Chia Yeo, Chien-Chao Huang, Chao-Hsiung Wang, Tien-Chih Chang +4 more | 2008-04-15 |
| 7355236 | Non-volatile floating gate memory cells with polysilicon storage dots and fabrication methods thereof | Tzyh-Cheang Lee, Jiunn-Ren Hwang, Tsung-Lin Lee | 2008-04-08 |
| 7342289 | Strained silicon MOS devices | Chien-Chao Huang, Chung-Hu Ge, Wen-Chin Lee, Chenming Hu, Carlos H. Diaz | 2008-03-11 |
| 7319258 | Semiconductor-on-insulator chip with<100>-oriented transistors | Yee-Chia Yeo, Hung-Wei Chen, Tim Tsao, Chenming Hu | 2008-01-15 |
| 7300837 | FinFET transistor device on SOI and method of fabrication | Hau-Yu Chen, Chang-Yun Chang, Cheng-Chung Huang | 2007-11-27 |
| 7301206 | Semiconductor-on-insulator SRAM configured using partially-depleted and fully-depleted transistors | Yee-Chia Yeo, Chenming Hu | 2007-11-27 |
| 7276763 | Structure and method for forming the gate electrode in a multiple-gate transistor | Yee-Chia Yeo | 2007-10-02 |
| 7268024 | Semiconductor-on-insulator chip incorporating strained-channel partially-depleted, fully-depleted, and multiple-gate transistors | Yee-Chia Yeo, How-Yu Chen, Chien-Chao Huang, Wen-Chin Lee, Chenming Hu | 2007-09-11 |