Issued Patents All Time
Showing 26–50 of 159 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 8173990 | Memory array with a selector connected to multiple resistive cells | Tzyh-Cheang Lee, Chun-Sheng Liang, Jiunn-Ren Hwang | 2012-05-08 |
| 8174073 | Integrated circuit structures with multiple FinFETs | Tsung-Lin Lee, Chang-Yun Chang, Sheng-Da Liu | 2012-05-08 |
| 8154003 | Resistive non-volatile memory device | Tzyh-Cheang Lee, Tseung-Yuen Tseng, Chih-Yang Lin | 2012-04-10 |
| 8053839 | Doping of semiconductor fin devices | Yee-Chia Yeo, Ping-Wei Wang, Hao Chen, Chenming Hu | 2011-11-08 |
| 8049300 | Inductor energy loss reduction techniques | Andrew S. Yeh, Alex Chang, Sung-Pi Tseng, Chang-Yun Chang, Hao Chen | 2011-11-01 |
| 8008157 | CMOS device with raised source and drain regions | Chun-Sheng Liang, Hung-Ming Chen, Chien-Chao Huang | 2011-08-30 |
| 7989920 | Phase change memory | Tzyh-Cheang Lee, Ming-Yi Yang, Denny Tang | 2011-08-02 |
| 7948037 | Multiple-gate transistor structure and method for fabricating | Hao Chen, Yee-Chia Yeo | 2011-05-24 |
| 7943986 | Method for fabricating a body contact in a finfet structure and a device including the same | Kuo-Nan Yang, Yi Chen, Hou-Yu Chen, Chenming Hu | 2011-05-17 |
| 7923759 | Metal gate semiconductor device and manufacturing method | Chien-Chao Huang, Kuang-Hsin Chen | 2011-04-12 |
| 7893420 | Phase change memory with various grain sizes | Chun-Sheng Liang, Tzyh-Cheang Lee | 2011-02-22 |
| 7888201 | Semiconductor-on-insulator SRAM configured using partially-depleted and fully-depleted transistors | Yee-Chia Yeo, Chenming Hu | 2011-02-15 |
| 7863674 | Multiple-gate transistors formed on bulk substrates | Yee-Chia Yeo, Chenming Hu | 2011-01-04 |
| 7851276 | Methods and structures for planar and multiple-gate transistors formed on SOI | Yee-Chia Yeo, Chenming Hu | 2010-12-14 |
| 7732310 | Sidewall memory with self-aligned asymmetrical source and drain configuration | Tzyh-Cheang Lee | 2010-06-08 |
| 7728360 | Multiple-gate transistor structure | Hao Chen, Yee-Chia Yeo | 2010-06-01 |
| 7705424 | Phase change memory | Tzyh-Cheang Lee, Ming-Yi Yang, Denny Tang | 2010-04-27 |
| 7704809 | Silicon-on-insulator chip with multiple crystal orientations | Yee-Chia Yeo | 2010-04-27 |
| 7701008 | Doping of semiconductor fin devices | Yee-Chia Yeo, Ping-Wei Wang, Hao Chen, Chenming Hu | 2010-04-20 |
| 7663134 | Memory array with a selector connected to multiple resistive cells | Tzyh-Cheang Lee, Chun-Sheng Liang, Jiunn-Ren Hwang | 2010-02-16 |
| 7659587 | Complementary metal oxide semiconductor transistor technology using selective epitaxy of a strained silicon germanium layer | Yee-Chia Yeo, Chun-Chieh Lin, Chen Ming Hu | 2010-02-09 |
| 7642170 | Phase change memory cell with roundless micro-trenches | Tzyh-Cheang Lee, Chun-Sheng Liang | 2010-01-05 |
| 7638376 | Method for forming SOI device | Cheng-Kuo Wen, Chien-Chao Huang, Hao Chen, Hsun-Chih Tsao | 2009-12-29 |
| 7635632 | Gate electrode for a semiconductor fin device | Yee-Chia Yeo, Hao Chen, Chenming Hu | 2009-12-22 |
| 7602006 | Semiconductor flash device | Chien-Chao Huang, Chi Min-Hwa | 2009-10-13 |