Issued Patents All Time
Showing 76–100 of 259 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10818778 | Heterogeneous semiconductor device substrates with high quality epitaxy | Mark van Dal, Martin Christopher Holland | 2020-10-27 |
| 10818780 | Devices having a semiconductor material that is semimetal in bulk and methods of forming the same | Jean-Pierre Colinge, Yee-Chia Yeo | 2020-10-27 |
| 10811509 | Multi-gate device and method of fabrication thereof | Kuo-Cheng Ching, Ching-Fang Huang, Chih-Hao Wang, Wen-Hsing Hsieh, Ying-Keung Leung | 2020-10-20 |
| 10804381 | Structure and method for FinFET device with buried sige oxide | Kuo-Cheng Ching, Chih-Hao Wang, Zhiqiang Wu | 2020-10-13 |
| 10784362 | Semiconductor device and manufacturing method thereof | Chun-Chieh Lu, Chih-Sheng Chang, Cheng-Yi Peng, Ling-Yen Yeh | 2020-09-22 |
| 10770592 | Multi-gate semiconductor device and method for forming the same | I-Sheng Chen, Tzu-Chiang Chen, Cheng-Hsien Wu, Ling-Yen Yeh | 2020-09-08 |
| 10763198 | Monolithic 3D integration inter-tier vias insertion scheme and associated layout structure | Ta-Pen Guo, Jean-Pierre Colinge, Yi-Hsiung Lin | 2020-09-01 |
| 10741678 | Semiconductor device and manufacturing method thereof | Chun-Chieh Lu, Chih-Sheng Chang, Cheng-Yi Peng, Ling-Yen Yeh, Chien-Hsing Lee | 2020-08-11 |
| 10734503 | Asymmetric semiconductor device | Jean-Pierre Colinge, Yeh Hsu, Tsung-Hsing Yu, Chia-Wen Liu | 2020-08-04 |
| 10734500 | Horizontal gate all-around device having wrapped-around source and drain | Chun-Hsiung Lin, Chung-Cheng Wu, Chih-Hao Wang, Wen-Hsing Hsieh, Yi-Ming Sheu | 2020-08-04 |
| 10734472 | Negative capacitance FET with improved reliability performance | Chun-Chieh Lu, Cheng-Yi Peng, Chien-Hsing Lee, Ling-Yen Yeh, Chih-Sheng Chang | 2020-08-04 |
| 10732209 | Semiconductor test device and manufacturing method thereof | Cheng-Yi Peng, Chia-Cheng Ho, Ming-Shiang Lin, Chih-Sheng Chang | 2020-08-04 |
| 10727314 | FinFET with a semiconductor strip as a base | Kuo-Cheng Chiang, Shi Ning Ju, Ching-Wei Tsai, Chih-Hao Wang, Ying-Keung Leung | 2020-07-28 |
| 10727301 | Semiconductor liner of semiconductor device | Kuo-Cheng Chiang, Chih-Hao Wang | 2020-07-28 |
| 10727230 | Integrated semiconductor device with 2D material layer | Cheng-Yi Peng, Chun-Chieh Lu, Meng-Hsuan Hsiao, Ling-Yen Yeh, Tung Ying Lee | 2020-07-28 |
| 10714349 | Semiconductor device and manufacturing method thereof | Jean-Pierre Colinge | 2020-07-14 |
| 10705766 | 3D cross-bar nonvolatile memory | Jean-Pierre Colinge, Ta-Pen Guo | 2020-07-07 |
| 10699964 | Silicon and silicon germanium nanowire formation | Kuo-Cheng Ching, Jean-Pierre Colinge | 2020-06-30 |
| 10676351 | Nano-electromechanical system (NEMS) device structure and method for forming the same | Hsin-Ping Chen, Ken-Ichi Goto, Shau-Lin Shue, Tai-I Yang | 2020-06-09 |
| 10672975 | Magnetic tunnel junction with reduced damage | Harry-Hak-Lay Chuang, Ru-Liang Lee | 2020-06-02 |
| 10670641 | Semiconductor test device and manufacturing method thereof | Cheng-Yi Peng, Chia-Cheng Ho, Ming-Shiang Lin, Chih-Sheng Chang | 2020-06-02 |
| 10651314 | Nanowire stack GAA device with inner spacer and methods for producing the same | I-Sheng Chen, Chao-Ching Cheng, Tzu-Chiang Chen | 2020-05-12 |
| 10644168 | 2-D material transistor with vertical structure | Jean-Pierre Colinge, Chung-Cheng Wu, Chih-Hao Wang, Ken-Ichi Goto, Ta-Pen Guo +3 more | 2020-05-05 |
| 10559563 | Method for manufacturing monolithic three-dimensional (3D) integrated circuits | Jean-Pierre Colinge, Ta-Pen Guo | 2020-02-11 |
| 10553718 | Semiconductor devices with core-shell structures | Chun-Hsiung Lin, Huicheng Chang, Syun-Ming Jang, Chien-Hsun Wang, Mao-Lin Huang | 2020-02-04 |