Issued Patents All Time
Showing 1–22 of 22 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10756077 | Chip packaging method | Wen-Yuan Chang, Hsueh-Chung Shelton Lu, Wei-Cheng Chen | 2020-08-25 |
| 10734503 | Asymmetric semiconductor device | Jean-Pierre Colinge, Carlos H. Diaz, Tsung-Hsing Yu, Chia-Wen Liu | 2020-08-04 |
| 10504847 | Chip package structure and chip package structure array | Wen-Yuan Chang, Hsueh-Chung Shelton Lu, Wei-Cheng Chen | 2019-12-10 |
| 10276664 | Semiconductor structures and methods for multi-dimension of nanowire diameter to improve drive current | Tsung-Hsing Yu, Chia-Wen Liu, Jean-Pierre Colinge | 2019-04-30 |
| 10204852 | Circuit substrate and semiconductor package structure | Chen-Yueh Kung | 2019-02-12 |
| 10026826 | Method of forming semiconductor device having gate dielectric surrounding at least some of channel region and gate electrode surrounding at least some of gate dielectric | Jean-Pierre Colinge, Carlos H. Diaz, Tsung-Hsing Yu, Chia-Wen Liu | 2018-07-17 |
| 9768297 | Process design to improve transistor variations and performance | Tsung-Hsing Yu, Chia-Wen Liu, Shih-Syuan Huang, Ken-Ichi Goto, Zhiqiang Wu | 2017-09-19 |
| 9728602 | Variable channel strain of nanowire transistors to improve drive current | Tsung-Hsing Yu, Chia-Wen Liu, Jean-Pierre Colinge | 2017-08-08 |
| 9716172 | Semiconductor device having multiple active area layers and its formation thereof | Tsung-Hsing Yu, Chia-Wen Liu, Ken-Ichi Goto | 2017-07-25 |
| 9634132 | Semiconductor structures and methods for multi-level band gap energy of nanowire transistors to improve drive current | Tsung-Hsing Yu, Chia-Wen Liu, Jean-Pierre Colinge | 2017-04-25 |
| 9620591 | Semiconductor structures and methods for multi-level work function and multi-valued channel doping of nanowire transistors to improve drive current | Tsung-Hsing Yu, Chia-Wen Liu, Jean-Pierre Colinge | 2017-04-11 |
| 9601425 | Circuit substrate and semiconductor package structure | Chen-Yueh Kung | 2017-03-21 |
| 9536746 | Recess and epitaxial layer to improve transistor performance | Chia-Wen Liu, Tsung-Hsing Yu, Ken-Ichi Goto, Shih-Syuan Huang | 2017-01-03 |
| 9525031 | Epitaxial channel | Tsung-Hsing Yu, Ken-Ichi Goto, Chia-Wen Liu | 2016-12-20 |
| 9484460 | Semiconductor device having gate dielectric surrounding at least some of channel region and gate electrode surrounding at least some of gate dielectric | Jean-Pierre Colinge, Tsung-Hsing Yu, Chia-Wen Liu, Carlos H. Diaz | 2016-11-01 |
| 9418964 | Chip package structure | Wen-Yuan Chang, Wei-Chih Lai | 2016-08-16 |
| 9224814 | Process design to improve transistor variations and performance | Tsung-Hsing Yu, Chia-Wen Liu, Shih-Syuan Huang, Ken-Ichi Goto, Zhiqiang Wu | 2015-12-29 |
| 9196730 | Variable channel strain of nanowire transistors to improve drive current | Tsung-Hsing Yu, Chia-Wen Liu, Jean-Pierre Colinge | 2015-11-24 |
| 8796848 | Circuit board and chip package structure | Wen-Yuan Chang, Wei-Cheng Chen | 2014-08-05 |
| 8736079 | Pad structure, circuit carrier and integrated circuit chip | Yu-Kai Chen | 2014-05-27 |
| 8698325 | Integrated circuit package and physical layer interface arrangement | Wen-Yuan Chang, Yu-Kai Chen, Ying-Ni Lee, Wei-Chih Lai | 2014-04-15 |
| 7906377 | Fabrication method of circuit board | Wen-Yuan Chang, Wei-Cheng Chen | 2011-03-15 |