Issued Patents All Time
Showing 26–44 of 44 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 7735049 | Mask network design for scan-based integrated circuits | Laung-Terng Wang, Boryau (Jack) Sheu | 2010-06-08 |
| 7721173 | Method and apparatus for broadcasting scan patterns in a scan-based integrated circuit | Laung-Terng Wang, Hsin-Po Wang, Meng-Chyi Lin, Shyh-Horng Lin, Ta-Chia Yeh +2 more | 2010-05-18 |
| 7552373 | Method and apparatus for broadcasting scan patterns in a scan-based integrated circuit | Laung-Terng Wang, Hsin-Po Wang, Meng-Chyi Lin, Shyh-Horng Lin, Ta-Chia Yeh +2 more | 2009-06-23 |
| 7512851 | Method and apparatus for shifting at-speed scan patterns in a scan-based integrated circuit | Laung-Terng Wang, Khader S. Abdel-Hafez, Boryau (Jack) Sheu, Fei-Sheng Hsu, Augusli Kifli +4 more | 2009-03-31 |
| 7478295 | Method and apparatus of fault diagnosis for integrated logic circuits | Seiji Kajihara | 2009-01-13 |
| 7451371 | Multiple-capture DFT system for scan-based integrated circuits | Laung-Terng Wang | 2008-11-11 |
| 7444567 | Method and apparatus for unifying self-test with scan-test during prototype debug and production test | Laung-Terng Wang, Khader S. Abdel-Hafez, Shyh-Horng Lin, Hsin-Po Wang, Ming-Tung Chang +4 more | 2008-10-28 |
| 7434126 | Computer-aided design (CAD) multiple-capture DFT system for detecting or locating crossing clock-domain faults | Laung-Terng Wang, Po-Ching Hsu | 2008-10-07 |
| 7412672 | Method and apparatus for broadcasting scan patterns in a scan-based integrated circuit | Laung-Terng Wang, Shyh-Horng Lin, Khader S. Abdel-Hafez | 2008-08-12 |
| 7331032 | Computer-aided design system to automate scan synthesis at register-transfer level | Laung-Terng Wang, Augusli Kifli, Fei-Sheng Hsu, Shih-Chia Kao, Shyh-Horng Lin +1 more | 2008-02-12 |
| 7284175 | Method and apparatus for diagnosing failures in an integrated circuit using design-for-debug (DFD) techniques | Laung-Terng Wang, Ming-Tung Chang, Hao-Jan Chao, Po-Ching Hsu | 2007-10-16 |
| 7260756 | Multiple-capture DFT system for detecting or locating crossing clock-domain faults during scan-test | Laung-Terng Wang, Po-Ching Hsu | 2007-08-21 |
| 7191373 | Method and apparatus for diagnosing failures in an integrated circuit using design-for-debug (DFD) techniques | Laung-Terng Wang, Ming-Tung Chang, Shyh-Horng Lin, Hao-Jan Chao, Jaehee Lee +6 more | 2007-03-13 |
| 7124342 | Smart capture for ATPG (automatic test pattern generation) and fault simulation of scan-based integrated circuits | Laung-Terng Wang, Khader S. Abdel-Hafez, Boryau (Jack) Sheu, Shun-Miin (Sam) Wang | 2006-10-17 |
| 7058869 | Method and apparatus for debug, diagnosis, and yield improvement of scan-based integrated circuits | Khader S. Abdel-Hafez, Laung-Terng Wang, Po-Ching Hsu, Shih-Chia Kao, Hao-Jan Chao +1 more | 2006-06-06 |
| 7032148 | Mask network design for scan-based integrated circuits | Laung-Terng Wang, Shun-Miin (Sam) Wang, Khader S. Abdel-Hafez, Boryau (Jack) Sheu | 2006-04-18 |
| 7007213 | Multiple-capture DFT system for detecting or locating crossing clock-domain faults during self-test or scan-test | Laung-Terng Wang, Po-Ching Hsu, Shih-Chia Kao, Meng-Chyi Lin, Hsin-Po Wang +1 more | 2006-02-28 |
| 6957403 | Computer-aided design system to automate scan synthesis at register-transfer level | Laung-Terng Wang, Augusli Kifli, Fei-Sheng Hsu, Shih-Chia Kao, Shyh-Horng Lin +1 more | 2005-10-18 |
| 6954887 | Multiple-capture DFT system for scan-based integrated circuits | Laung-Terng Wang, Meng-Chyi Lin, Hsin-Po Wang, Chi-Chan Hsu, Shih-Chia Kao +1 more | 2005-10-11 |