Issued Patents All Time
Showing 1–14 of 14 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9057763 | Multiple-capture DFT system for detecting or locating crossing clock-domain faults during self-test or scan-test | Laung-Terng Wang, Po-Ching Hsu, Meng-Chyi Lin, Hsin-Po Wang, Hao-Jan Chao +1 more | 2015-06-16 |
| 9026875 | Multiple-capture DFT system for detecting or locating crossing clock-domain faults during self-test or scan-test | Laung-Terng Wang, Po-Ching Hsu, Meng-Chyi Lin, Hsin-Po Wang, Hao-Jan Chao +1 more | 2015-05-05 |
| 8769359 | Multiple-capture DFT system for detecting or locating crossing clock-domain faults during self-test or scan-test | Luang-Terng Wang, Po-Ching Hsu, Meng-Chyi Lin, Hsin-Po Wang, Hao-Jan Chao +1 more | 2014-07-01 |
| 8543950 | Computer-aided design system to automate scan synthesis at register-transfer level | Laung-Terng Wang, Augusli Kifli, Fei-Sheng Hsu, Xiaoqing Wen, Shyh-Horng Lin +1 more | 2013-09-24 |
| 7904773 | Multiple-capture DFT system for scan-based integrated circuits | Laung-Terng Wang, Meng-Chyi Lin, Xiaoqing Wen, Hsin-Po Wang, Chi-Chan Hsu +1 more | 2011-03-08 |
| 7779323 | Multiple-capture DFT system for detecting or locating crossing clock-domain faults during self-test or scan-test | Laung-Terng Wang, Po-Ching Hsu, Meng-Chyi Lin, Hsin-Po Wang, Hao-Jan Chao +1 more | 2010-08-17 |
| 7444567 | Method and apparatus for unifying self-test with scan-test during prototype debug and production test | Laung-Terng Wang, Xiaoqing Wen, Khader S. Abdel-Hafez, Shyh-Horng Lin, Hsin-Po Wang +4 more | 2008-10-28 |
| 7441165 | Read-only memory and operational control method thereof | Tsai-Wang Tseng, Shing-Wu Tung | 2008-10-21 |
| 7331032 | Computer-aided design system to automate scan synthesis at register-transfer level | Laung-Terng Wang, Augusli Kifli, Fei-Sheng Hsu, Xiaoqing Wen, Shyh-Horng Lin +1 more | 2008-02-12 |
| 7191373 | Method and apparatus for diagnosing failures in an integrated circuit using design-for-debug (DFD) techniques | Laung-Terng Wang, Ming-Tung Chang, Shyh-Horng Lin, Hao-Jan Chao, Jaehee Lee +6 more | 2007-03-13 |
| 7058869 | Method and apparatus for debug, diagnosis, and yield improvement of scan-based integrated circuits | Khader S. Abdel-Hafez, Xiaoqing Wen, Laung-Terng Wang, Po-Ching Hsu, Hao-Jan Chao +1 more | 2006-06-06 |
| 7007213 | Multiple-capture DFT system for detecting or locating crossing clock-domain faults during self-test or scan-test | Laung-Terng Wang, Po-Ching Hsu, Meng-Chyi Lin, Hsin-Po Wang, Hao-Jan Chao +1 more | 2006-02-28 |
| 6957403 | Computer-aided design system to automate scan synthesis at register-transfer level | Laung-Terng Wang, Augusli Kifli, Fei-Sheng Hsu, Xiaoqing Wen, Shyh-Horng Lin +1 more | 2005-10-18 |
| 6954887 | Multiple-capture DFT system for scan-based integrated circuits | Laung-Terng Wang, Meng-Chyi Lin, Xiaoqing Wen, Hsin-Po Wang, Chi-Chan Hsu +1 more | 2005-10-11 |