HW

Hsin-Po Wang

ST Syntest Technologies: 18 patents #3 of 31Top 10%
SU Springsoft Usa: 2 patents #5 of 58Top 9%
SC Sunplus Technology Co.: 2 patents #80 of 275Top 30%
SP Springsoft: 1 patents #28 of 69Top 45%
SY Synopsys: 1 patents #1,143 of 2,302Top 50%
SC Synopsys Taiwan Co.: 1 patents #19 of 52Top 40%
Overall (All Time): #162,878 of 4,157,543Top 4%
25
Patents All Time

Issued Patents All Time

Showing 1–25 of 25 patents

Patent #TitleCo-InventorsDate
10990743 Creating gateway model routing sub-templates Song Yuan, Chao Wang 2021-04-27
9696377 Method and apparatus for broadcasting scan patterns in a scan-based integrated circuit Laung-Terng Wang, Xiaoqing Wen, Meng-Chyi Lin, Shyh-Horng Lin, Ta-Chia Yeh +2 more 2017-07-04
9121902 Method and apparatus for broadcasting scan patterns in a scan-based integrated circuit Laung-Terng Wang 2015-09-01
9110139 Method and apparatus for broadcasting scan patterns in a scan-based integrated circuit Laung-Terng Wang 2015-08-18
9057763 Multiple-capture DFT system for detecting or locating crossing clock-domain faults during self-test or scan-test Laung-Terng Wang, Po-Ching Hsu, Shih-Chia Kao, Meng-Chyi Lin, Hao-Jan Chao +1 more 2015-06-16
9026875 Multiple-capture DFT system for detecting or locating crossing clock-domain faults during self-test or scan-test Laung-Terng Wang, Po-Ching Hsu, Shih-Chia Kao, Meng-Chyi Lin, Hao-Jan Chao +1 more 2015-05-05
8990756 Gateway model routing with slits on wires Song Yuan, Hung-Shih Wang 2015-03-24
8769359 Multiple-capture DFT system for detecting or locating crossing clock-domain faults during self-test or scan-test Luang-Terng Wang, Po-Ching Hsu, Shih-Chia Kao, Meng-Chyi Lin, Hao-Jan Chao +1 more 2014-07-01
8543950 Computer-aided design system to automate scan synthesis at register-transfer level Laung-Terng Wang, Augusli Kifli, Fei-Sheng Hsu, Shih-Chia Kao, Xiaoqing Wen +1 more 2013-09-24
8086982 Methods and systems for reducing clock skew in a gated clock tree Chia-Ming Chang, Shih-Hsu Huang, Yuan-Kai Ho, Jia-Zong Lin, Yu-Sheng Lu 2011-12-27
8015522 System for implementing post-silicon IC design changes Yu-Sheng Lu, Fong-Yuan Chang, Yi-Der Lin, Sung-Han Tsai, Ru Lin Yang +2 more 2011-09-06
7904773 Multiple-capture DFT system for scan-based integrated circuits Laung-Terng Wang, Meng-Chyi Lin, Xiaoqing Wen, Chi-Chan Hsu, Shih-Chia Kao +1 more 2011-03-08
7808871 Power control apparatus and method for an optical drive Lu-Chia Tseng, Shu-Ming Chang 2010-10-05
7779323 Multiple-capture DFT system for detecting or locating crossing clock-domain faults during self-test or scan-test Laung-Terng Wang, Po-Ching Hsu, Shih-Chia Kao, Meng-Chyi Lin, Hao-Jan Chao +1 more 2010-08-17
7721173 Method and apparatus for broadcasting scan patterns in a scan-based integrated circuit Laung-Terng Wang, Xiaoqing Wen, Meng-Chyi Lin, Shyh-Horng Lin, Ta-Chia Yeh +2 more 2010-05-18
7552373 Method and apparatus for broadcasting scan patterns in a scan-based integrated circuit Laung-Terng Wang, Xiaoqing Wen, Meng-Chyi Lin, Shyh-Horng Lin, Ta-Chia Yeh +2 more 2009-06-23
7461310 IC functional and delay fault testing 2008-12-02
7450482 Method for optimizing write parameters of optical storage medium and recording device therefor Yao-Yu Lee, Yueh-Hsuan Tsai 2008-11-11
7444567 Method and apparatus for unifying self-test with scan-test during prototype debug and production test Laung-Terng Wang, Xiaoqing Wen, Khader S. Abdel-Hafez, Shyh-Horng Lin, Ming-Tung Chang +4 more 2008-10-28
7331032 Computer-aided design system to automate scan synthesis at register-transfer level Laung-Terng Wang, Augusli Kifli, Fei-Sheng Hsu, Xiaoqing Wen, Shih-Chia Kao +1 more 2008-02-12
7191373 Method and apparatus for diagnosing failures in an integrated circuit using design-for-debug (DFD) techniques Laung-Terng Wang, Ming-Tung Chang, Shyh-Horng Lin, Hao-Jan Chao, Jaehee Lee +6 more 2007-03-13
7058869 Method and apparatus for debug, diagnosis, and yield improvement of scan-based integrated circuits Khader S. Abdel-Hafez, Xiaoqing Wen, Laung-Terng Wang, Po-Ching Hsu, Shih-Chia Kao +1 more 2006-06-06
7007213 Multiple-capture DFT system for detecting or locating crossing clock-domain faults during self-test or scan-test Laung-Terng Wang, Po-Ching Hsu, Shih-Chia Kao, Meng-Chyi Lin, Hao-Jan Chao +1 more 2006-02-28
6957403 Computer-aided design system to automate scan synthesis at register-transfer level Laung-Terng Wang, Augusli Kifli, Fei-Sheng Hsu, Shih-Chia Kao, Xiaoqing Wen +1 more 2005-10-18
6954887 Multiple-capture DFT system for scan-based integrated circuits Laung-Terng Wang, Meng-Chyi Lin, Xiaoqing Wen, Chi-Chan Hsu, Shih-Chia Kao +1 more 2005-10-11