Issued Patents All Time
Showing 1–25 of 57 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9696377 | Method and apparatus for broadcasting scan patterns in a scan-based integrated circuit | Hsin-Po Wang, Xiaoqing Wen, Meng-Chyi Lin, Shyh-Horng Lin, Ta-Chia Yeh +2 more | 2017-07-04 |
| 9678156 | Multiple-capture DFT method for detecting or locating crossing clock-domain faults during self-test or scan-test | Po-Ching Hsu, Xiaoqing Wen | 2017-06-13 |
| 9316688 | Multiple-capture DFT system for detecting or locating crossing clock-domain faults during scan-test | Po-Ching Hsu, Xiaoqing Wen | 2016-04-19 |
| 9274168 | Multiple-capture DFT system for detecting or locating crossing clock-domain faults during scan-test | Po-Ching Hsu, Xiaoqing Wen | 2016-03-01 |
| 9121902 | Method and apparatus for broadcasting scan patterns in a scan-based integrated circuit | Hsin-Po Wang | 2015-09-01 |
| 9110139 | Method and apparatus for broadcasting scan patterns in a scan-based integrated circuit | Hsin-Po Wang | 2015-08-18 |
| 9091730 | Multiple-capture DFT system for detecting or locating crossing clock-domain faults during scan-test | Po-Ching Hsu, Xiaoqing Wen | 2015-07-28 |
| 9057763 | Multiple-capture DFT system for detecting or locating crossing clock-domain faults during self-test or scan-test | Po-Ching Hsu, Shih-Chia Kao, Meng-Chyi Lin, Hsin-Po Wang, Hao-Jan Chao +1 more | 2015-06-16 |
| 9046572 | Computer-aided design (CAD) multiple-capture DFT system for detecting or locating crossing clock-domain faults | Po-Ching Hsu, Xiaqing Wen | 2015-06-02 |
| 9026875 | Multiple-capture DFT system for detecting or locating crossing clock-domain faults during self-test or scan-test | Po-Ching Hsu, Shih-Chia Kao, Meng-Chyi Lin, Hsin-Po Wang, Hao-Jan Chao +1 more | 2015-05-05 |
| 8949299 | Method and apparatus for hybrid ring generator design | Nur A. Touba | 2015-02-03 |
| 8775985 | Computer-aided design system to automate scan synthesis at register-transfer level | Xiaoqing Wen | 2014-07-08 |
| 8667451 | Method and apparatus for broadcasting scan patterns in a scan-based integrated circuit | — | 2014-03-04 |
| 8543950 | Computer-aided design system to automate scan synthesis at register-transfer level | Augusli Kifli, Fei-Sheng Hsu, Shih-Chia Kao, Xiaoqing Wen, Shyh-Horng Lin +1 more | 2013-09-24 |
| 8522096 | Method and apparatus for testing 3D integrated circuits | Nur A. Touba, Michael Hsiao, Zhigang Jiang, Shianling Wu | 2013-08-27 |
| 8458544 | Multiple-capture DFT system to reduce peak capture power during self-test or scan test | Hao-Jan Chao, Shianling Wu | 2013-06-04 |
| 8418100 | Robust scan synthesis for protecting soft errors | Nur A. Touba, Shianling Wu, Ravi Apte | 2013-04-09 |
| 8402328 | Apparatus and method for protecting soft errors | Nur A. Touba, Zhigang Jiang | 2013-03-19 |
| 8335954 | Method and apparatus for low-pin-count scan compression | Nur A. Touba, Shianling Wu | 2012-12-18 |
| 8230282 | Method and apparatus for low-pin-count scan compression | Nur A. Touba, Zhigang Jiang, Shianling Wu, Jianping Yan | 2012-07-24 |
| 8219945 | Computer-aided design system to automate scan synthesis at register-transfer level | Xiaoqing Wen | 2012-07-10 |
| 8161441 | Robust scan synthesis for protecting soft errors | Nur A. Touba, Zhigang Jiang, Shianling Wu, Ravi Apte | 2012-04-17 |
| 8091002 | Multiple-capture DFT system to reduce peak capture power during self-test or scan test | Shianling Wu, Zhigang Jiang, Jinsong Liu, Hao-Jan Chao, Lizhen Yu +3 more | 2012-01-03 |
| 7996741 | Method and apparatus for low-pin-count scan compression | Nur A. Touba, Zhigang Jiang, Shianling Wu, Jianping Yan | 2011-08-09 |
| 7945830 | Method and apparatus for unifying self-test with scan-test during prototype debug and production test | Xiaoqing Wen | 2011-05-17 |