Issued Patents All Time
Showing 51–57 of 57 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 7191373 | Method and apparatus for diagnosing failures in an integrated circuit using design-for-debug (DFD) techniques | Ming-Tung Chang, Shyh-Horng Lin, Hao-Jan Chao, Jaehee Lee, Hsin-Po Wang +6 more | 2007-03-13 |
| 7124342 | Smart capture for ATPG (automatic test pattern generation) and fault simulation of scan-based integrated circuits | Khader S. Abdel-Hafez, Xiaoqing Wen, Boryau (Jack) Sheu, Shun-Miin (Sam) Wang | 2006-10-17 |
| 7058869 | Method and apparatus for debug, diagnosis, and yield improvement of scan-based integrated circuits | Khader S. Abdel-Hafez, Xiaoqing Wen, Po-Ching Hsu, Shih-Chia Kao, Hao-Jan Chao +1 more | 2006-06-06 |
| 7032148 | Mask network design for scan-based integrated circuits | Shun-Miin (Sam) Wang, Khader S. Abdel-Hafez, Xiaoqing Wen, Boryau (Jack) Sheu | 2006-04-18 |
| 7007213 | Multiple-capture DFT system for detecting or locating crossing clock-domain faults during self-test or scan-test | Po-Ching Hsu, Shih-Chia Kao, Meng-Chyi Lin, Hsin-Po Wang, Hao-Jan Chao +1 more | 2006-02-28 |
| 6957403 | Computer-aided design system to automate scan synthesis at register-transfer level | Augusli Kifli, Fei-Sheng Hsu, Shih-Chia Kao, Xiaoqing Wen, Shyh-Horng Lin +1 more | 2005-10-18 |
| 6954887 | Multiple-capture DFT system for scan-based integrated circuits | Meng-Chyi Lin, Xiaoqing Wen, Hsin-Po Wang, Chi-Chan Hsu, Shih-Chia Kao +1 more | 2005-10-11 |