MC

Ming-Tung Chang

NL Nuctech Company Limited: 7 patents #103 of 517Top 20%
ST Syntest Technologies: 4 patents #15 of 31Top 50%
TU Tsinghua University: 3 patents #542 of 2,815Top 20%
GU Global Unichip: 2 patents #71 of 210Top 35%
NU National Taiwan University: 1 patents #729 of 2,195Top 35%
TSMC: 1 patents #8,466 of 12,232Top 70%
Overall (All Time): #337,497 of 4,157,543Top 9%
14
Patents All Time

Issued Patents All Time

Showing 1–14 of 14 patents

Patent #TitleCo-InventorsDate
11906447 Multi-channel static CT device Zhiqiang Chen, Li Zhang, Xiaofei Xu, Le Shen, Hu Tang +2 more 2024-02-20
11479369 Baggage cart Li Zhang, Zhiqiang Chen, Qingping Huang, Wenyuan Bi, Xin Jin +2 more 2022-10-25
11215570 Security inspection system and method Li Zhang, Zhiqiang Chen, Qingping Huang, Wenyuan Bi, Xin Jin +2 more 2022-01-04
10942290 X-ray detection system and method Li Zhang, Zhiqiang Chen, Yunda Sun, Xin Jin, Xiaofei Xu 2021-03-09
10776558 Testing system and testing method Shih-Hsin Chen, Te-Hsun Fu 2020-09-15
10379067 Method and system for liquid detection Zhiqiang Chen, Li Zhang, Tianyi Yang Dai, Ji Zhao, Xin Jin 2019-08-13
10295481 Detection system and method Zhiqiang Chen, Li Zhang, Tianyi Yang Dai, Ji Zhao, Xin Jin 2019-05-21
10175182 CT detection method and CT device Yongshun Xiao, Zhiqiang Chen, Ziran Zhao 2019-01-08
8487645 Through silicon via testing structure Min-Hsiu Tsai, Chih-Mou Tseng 2013-07-16
8468407 Method for creating test clock domain during integrated circuit design, and associated computer readable medium Min-Hsiu Tsai, Chih-Mou Tseng, Jen-Yang Wen, Chien-Mo Li 2013-06-18
7512851 Method and apparatus for shifting at-speed scan patterns in a scan-based integrated circuit Laung-Terng Wang, Khader S. Abdel-Hafez, Xiaoqing Wen, Boryau (Jack) Sheu, Fei-Sheng Hsu +4 more 2009-03-31
7444567 Method and apparatus for unifying self-test with scan-test during prototype debug and production test Laung-Terng Wang, Xiaoqing Wen, Khader S. Abdel-Hafez, Shyh-Horng Lin, Hsin-Po Wang +4 more 2008-10-28
7284175 Method and apparatus for diagnosing failures in an integrated circuit using design-for-debug (DFD) techniques Laung-Terng Wang, Hao-Jan Chao, Xiaoqing Wen, Po-Ching Hsu 2007-10-16
7191373 Method and apparatus for diagnosing failures in an integrated circuit using design-for-debug (DFD) techniques Laung-Terng Wang, Shyh-Horng Lin, Hao-Jan Chao, Jaehee Lee, Hsin-Po Wang +6 more 2007-03-13