Issued Patents All Time
Showing 1–24 of 24 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12400065 | Capture IR drop analyzer and analyzing method thereof | Chen-Yuan Kao | 2025-08-26 |
| 12222576 | Optical element driving mechanism | Chao-Chang Hu, Kuen-Wang Tsai, Liang-Ting Ho, Chao-Hsi Wang, Chih-Wei Weng +8 more | 2025-02-11 |
| 12078861 | Optical system | Jungsuck Ryoo, Chao-Chang Hu, Shu-Shan CHEN, Chieh-An CHANG | 2024-09-03 |
| 11867969 | Optical element driving mechanism | Jungsuck Ryoo, Chieh-An CHANG, Chao-Chang Hu, Shu-Shan CHEN, Pai-Jui CHENG +1 more | 2024-01-09 |
| 11852886 | Optical element driving mechanism | Chao-Chang Hu, Kuen-Wang Tsai, Liang-Ting Ho, Chao-Hsi Wang, Chih-Wei Weng +8 more | 2023-12-26 |
| 11809013 | Optical system | Jungsuck Ryoo, Pai-Jui CHENG, Chao-Chang Hu, Shu-Shan CHEN, Chieh-An CHANG | 2023-11-07 |
| 11686919 | Driving mechanism | Kai-Jing Fu, Chao-Chang Hu, Mao-Kuo Hsu, Juei-Hung Tsai | 2023-06-27 |
| 11630479 | Apparatus for adjusting skew of circuit signal and adjusting method thereof | Tse-Wei Wu, Chen-Yuan Kao | 2023-04-18 |
| 11561360 | Optical system | Jungsuck Ryoo, Pai-Jui CHENG, Chao-Chang Hu, Shu-Shan CHEN, Chieh-An CHANG | 2023-01-24 |
| 11550112 | Optical system | Jungsuck Ryoo, Chao-Chang Hu, Shu-Shan CHEN, Chieh-An CHANG | 2023-01-10 |
| 11422334 | Driving mechanism | Kai-Jing Fu, Chao-Chang Hu, Mao-Kuo Hsu, Juei-Hung Tsai | 2022-08-23 |
| 11409069 | Optical element driving mechanism | Chao-Chang Hu, Kuen-Wang Tsai, Liang-Ting Ho, Chao-Hsi Wang, Chih-Wei Weng +8 more | 2022-08-09 |
| 11314031 | Optical element driving mechanism | Chao-Chang Hu, Shu-Shan CHEN, Jungsuck Ryoo, Chieh-An CHANG, Pai-Jui CHENG | 2022-04-26 |
| 11256838 | Establishing method for timing model | Hsin-Hsiung Liao | 2022-02-22 |
| 11182524 | Fixing device for clock tree and fixing method thereof | Chen-Yuan Kao, Hsin-Lung Li | 2021-11-23 |
| 10909291 | Circuit correction system and method for increasing coverage of scan test | Tse-Wei Wu, Yu Su, Chen-Yuan Kao | 2021-02-02 |
| 10817633 | Timing model, timing model building method, and related top-level analysis method | Meng-Hsiu Tsai, Hsin-Hsiung Liao | 2020-10-27 |
| 10614260 | Model-building method for building top interface logic model | Meng-Hsiu Tsai, Hsin-Hsiung Liao | 2020-04-07 |
| 10311185 | Model-building method and model-building system | Hsin-Hsiung Liao | 2019-06-04 |
| 9710580 | Timing analysis method for digital circuit design and system thereof | Teng-Nan Liao, Te-Hsun Fu, Hsin-Hsiung Liao, Cheng-Hong Tsai | 2017-07-18 |
| 9246488 | Low leakage boundary scan device design and implementation | — | 2016-01-26 |
| 8487645 | Through silicon via testing structure | Ming-Tung Chang, Chih-Mou Tseng | 2013-07-16 |
| 8473793 | Low leakage boundary scan device design and implementation | — | 2013-06-25 |
| 8468407 | Method for creating test clock domain during integrated circuit design, and associated computer readable medium | Ming-Tung Chang, Chih-Mou Tseng, Jen-Yang Wen, Chien-Mo Li | 2013-06-18 |