PH

Po-Ching Hsu

ST Syntest Technologies: 16 patents #4 of 31Top 15%
CI Chimei Innolux: 1 patents #232 of 654Top 40%
Overall (All Time): #275,915 of 4,157,543Top 7%
17
Patents All Time

Issued Patents All Time

Patent #TitleCo-InventorsDate
9678156 Multiple-capture DFT method for detecting or locating crossing clock-domain faults during self-test or scan-test Laung-Terng Wang, Xiaoqing Wen 2017-06-13
9316688 Multiple-capture DFT system for detecting or locating crossing clock-domain faults during scan-test Laung-Terng Wang, Xiaoqing Wen 2016-04-19
9274168 Multiple-capture DFT system for detecting or locating crossing clock-domain faults during scan-test Laung-Terng Wang, Xiaoqing Wen 2016-03-01
9091730 Multiple-capture DFT system for detecting or locating crossing clock-domain faults during scan-test Laung-Terng Wang, Xiaoqing Wen 2015-07-28
9057763 Multiple-capture DFT system for detecting or locating crossing clock-domain faults during self-test or scan-test Laung-Terng Wang, Shih-Chia Kao, Meng-Chyi Lin, Hsin-Po Wang, Hao-Jan Chao +1 more 2015-06-16
9046572 Computer-aided design (CAD) multiple-capture DFT system for detecting or locating crossing clock-domain faults Laung-Terng Wang, Xiaqing Wen 2015-06-02
9026875 Multiple-capture DFT system for detecting or locating crossing clock-domain faults during self-test or scan-test Laung-Terng Wang, Shih-Chia Kao, Meng-Chyi Lin, Hsin-Po Wang, Hao-Jan Chao +1 more 2015-05-05
8769359 Multiple-capture DFT system for detecting or locating crossing clock-domain faults during self-test or scan-test Luang-Terng Wang, Shih-Chia Kao, Meng-Chyi Lin, Hsin-Po Wang, Hao-Jan Chao +1 more 2014-07-01
8329517 Pixel structure and method for manufacturing the same — 2012-12-11
7779323 Multiple-capture DFT system for detecting or locating crossing clock-domain faults during self-test or scan-test Laung-Terng Wang, Shih-Chia Kao, Meng-Chyi Lin, Hsin-Po Wang, Hao-Jan Chao +1 more 2010-08-17
7444567 Method and apparatus for unifying self-test with scan-test during prototype debug and production test Laung-Terng Wang, Xiaoqing Wen, Khader S. Abdel-Hafez, Shyh-Horng Lin, Hsin-Po Wang +4 more 2008-10-28
7434126 Computer-aided design (CAD) multiple-capture DFT system for detecting or locating crossing clock-domain faults Laung-Terng Wang, Xiaoqing Wen 2008-10-07
7284175 Method and apparatus for diagnosing failures in an integrated circuit using design-for-debug (DFD) techniques Laung-Terng Wang, Ming-Tung Chang, Hao-Jan Chao, Xiaoqing Wen 2007-10-16
7260756 Multiple-capture DFT system for detecting or locating crossing clock-domain faults during scan-test Laung-Terng Wang, Xiaoqing Wen 2007-08-21
7191373 Method and apparatus for diagnosing failures in an integrated circuit using design-for-debug (DFD) techniques Laung-Terng Wang, Ming-Tung Chang, Shyh-Horng Lin, Hao-Jan Chao, Jaehee Lee +6 more 2007-03-13
7058869 Method and apparatus for debug, diagnosis, and yield improvement of scan-based integrated circuits Khader S. Abdel-Hafez, Xiaoqing Wen, Laung-Terng Wang, Shih-Chia Kao, Hao-Jan Chao +1 more 2006-06-06
7007213 Multiple-capture DFT system for detecting or locating crossing clock-domain faults during self-test or scan-test Laung-Terng Wang, Shih-Chia Kao, Meng-Chyi Lin, Hsin-Po Wang, Hao-Jan Chao +1 more 2006-02-28