Issued Patents All Time
Showing 1–19 of 19 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12321675 | Incremental compilation for FPGA-based systems | Ying-Tsai Chang, Kuen-Yang Tsai, Ryan Zhang | 2025-06-03 |
| 9696377 | Method and apparatus for broadcasting scan patterns in a scan-based integrated circuit | Laung-Terng Wang, Hsin-Po Wang, Xiaoqing Wen, Shyh-Horng Lin, Ta-Chia Yeh +2 more | 2017-07-04 |
| 9449138 | Prototype and emulation system for multiple custom prototype boards | Yingtsai Chang, Sweyyan Shei, Hung Chun Chiu, Hwa Mao, Ming Yang Wang +1 more | 2016-09-20 |
| 9384313 | Systems and methods for increasing debugging visibility of prototyping systems | Hung Chun Chiu, Kuen-Yang Tsai, Sweyyan Shei, Hwa Mao, Yingtsai Chang | 2016-07-05 |
| 9057763 | Multiple-capture DFT system for detecting or locating crossing clock-domain faults during self-test or scan-test | Laung-Terng Wang, Po-Ching Hsu, Shih-Chia Kao, Hsin-Po Wang, Hao-Jan Chao +1 more | 2015-06-16 |
| 9026875 | Multiple-capture DFT system for detecting or locating crossing clock-domain faults during self-test or scan-test | Laung-Terng Wang, Po-Ching Hsu, Shih-Chia Kao, Hsin-Po Wang, Hao-Jan Chao +1 more | 2015-05-05 |
| 8839179 | Prototype and emulation system for multiple custom prototype boards | Yingtsai Chang, Sweyyan Shei, Hung Chun Chiu, Hwa Mao, Ming Yang Wang +1 more | 2014-09-16 |
| 8769359 | Multiple-capture DFT system for detecting or locating crossing clock-domain faults during self-test or scan-test | Luang-Terng Wang, Po-Ching Hsu, Shih-Chia Kao, Hsin-Po Wang, Hao-Jan Chao +1 more | 2014-07-01 |
| 8739089 | Systems and methods for increasing debugging visibility of prototyping systems | Hung Chun Chiu, Kuen-Yang Tsai, Sweyyan Shei, Hwa Mao, Yingtsai Chang | 2014-05-27 |
| 8719762 | Method and apparatus for turning custom prototype boards into co-simulation, co-emulation systems | Yingtsai Chang, Sweyyan Shei, Hwa Mao, Ming Yang Wang, Yuchin Hsu | 2014-05-06 |
| 7970597 | Event-driven emulation system | Fei-Sheng Hsu, Sweyyan Shei | 2011-06-28 |
| 7904773 | Multiple-capture DFT system for scan-based integrated circuits | Laung-Terng Wang, Xiaoqing Wen, Hsin-Po Wang, Chi-Chan Hsu, Shih-Chia Kao +1 more | 2011-03-08 |
| 7779323 | Multiple-capture DFT system for detecting or locating crossing clock-domain faults during self-test or scan-test | Laung-Terng Wang, Po-Ching Hsu, Shih-Chia Kao, Hsin-Po Wang, Hao-Jan Chao +1 more | 2010-08-17 |
| 7721173 | Method and apparatus for broadcasting scan patterns in a scan-based integrated circuit | Laung-Terng Wang, Hsin-Po Wang, Xiaoqing Wen, Shyh-Horng Lin, Ta-Chia Yeh +2 more | 2010-05-18 |
| 7552373 | Method and apparatus for broadcasting scan patterns in a scan-based integrated circuit | Laung-Terng Wang, Hsin-Po Wang, Xiaoqing Wen, Shyh-Horng Lin, Ta-Chia Yeh +2 more | 2009-06-23 |
| 7444567 | Method and apparatus for unifying self-test with scan-test during prototype debug and production test | Laung-Terng Wang, Xiaoqing Wen, Khader S. Abdel-Hafez, Shyh-Horng Lin, Hsin-Po Wang +4 more | 2008-10-28 |
| 7191373 | Method and apparatus for diagnosing failures in an integrated circuit using design-for-debug (DFD) techniques | Laung-Terng Wang, Ming-Tung Chang, Shyh-Horng Lin, Hao-Jan Chao, Jaehee Lee +6 more | 2007-03-13 |
| 7007213 | Multiple-capture DFT system for detecting or locating crossing clock-domain faults during self-test or scan-test | Laung-Terng Wang, Po-Ching Hsu, Shih-Chia Kao, Hsin-Po Wang, Hao-Jan Chao +1 more | 2006-02-28 |
| 6954887 | Multiple-capture DFT system for scan-based integrated circuits | Laung-Terng Wang, Xiaoqing Wen, Hsin-Po Wang, Chi-Chan Hsu, Shih-Chia Kao +1 more | 2005-10-11 |