Issued Patents All Time
Showing 1–15 of 15 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12173931 | Water heater with convenient-to-install decorative plate | Delong Liang | 2024-12-24 |
| D1025324 | Water heater | Delong Liang, Jiaming Chen, Leming Liang | 2024-04-30 |
| 11782174 | Electrical resistance device for radiation detection | Phillip N. First, Thomas Michael Orlando, Elliot Christian Frey | 2023-10-10 |
| 8522096 | Method and apparatus for testing 3D integrated circuits | Laung-Terng Wang, Nur A. Touba, Michael Hsiao, Shianling Wu | 2013-08-27 |
| 8402328 | Apparatus and method for protecting soft errors | Laung-Terng Wang, Nur A. Touba | 2013-03-19 |
| 8230282 | Method and apparatus for low-pin-count scan compression | Nur A. Touba, Laung-Terng Wang, Shianling Wu, Jianping Yan | 2012-07-24 |
| 8161441 | Robust scan synthesis for protecting soft errors | Laung-Terng Wang, Nur A. Touba, Shianling Wu, Ravi Apte | 2012-04-17 |
| 8091002 | Multiple-capture DFT system to reduce peak capture power during self-test or scan test | Laung-Terng Wang, Shianling Wu, Jinsong Liu, Hao-Jan Chao, Lizhen Yu +3 more | 2012-01-03 |
| 7996741 | Method and apparatus for low-pin-count scan compression | Nur A. Touba, Laung-Terng Wang, Shianling Wu, Jianping Yan | 2011-08-09 |
| 7945833 | Method and apparatus for pipelined scan compression | Laung-Terng Wang, Nur A. Touba, Boryau (Jack) Sheu, Shianling Wu | 2011-05-17 |
| 7783940 | Apparatus for redundancy reconfiguration of faculty memories | Lizhen Yu, Shianling Wu, Laung-Terng Wang | 2010-08-24 |
| 7779322 | Compacting test responses using X-driven compactor | Zhigang Wang, Laung-Terng Wang, Shianling Wu, Xiaoqing Wen, Boryau (Jack) Sheu | 2010-08-17 |
| 7721172 | Method and apparatus for broadcasting test patterns in a scan-based integrated circuit | Laung-Terng Wang, Boryau (Jack) Sheu, Zhigang Wang, Shianling Wu | 2010-05-18 |
| 7412637 | Method and apparatus for broadcasting test patterns in a scan based integrated circuit | Laung-Terng Wang, Boryau (Jack) Sheu, Zhigang Wang, Shianling Wu | 2008-08-12 |
| 7210082 | Method for performing ATPG and fault simulation in a scan-based integrated circuit | Khader S. Abdel-Hafez, Laung-Terng Wang, Boryau (Jack) Sheu, Zhigang Wang | 2007-04-24 |