Issued Patents All Time
Showing 126–150 of 240 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9343141 | Reprogramming memory with single program pulse per data state | Liang Pang | 2016-05-17 |
| 9343156 | Balancing programming speeds of memory cells in a 3D stacked memory | Man Lung Mui, Yongke Sun | 2016-05-17 |
| 9343171 | Reduced erase-verify voltage for first-programmed word line in a memory device | Yongke Sun | 2016-05-17 |
| 9336891 | Look ahead read method for non-volatile memory | Jiahui Yuan, Wei Zhao | 2016-05-10 |
| 9336892 | Reducing hot electron injection type of read disturb in 3D non-volatile memory | Hong-Yan Chen, Charles See Yeung Kwong | 2016-05-10 |
| 9330779 | Detecting programmed word lines based on NAND string current | Man Lung Mui, Chris Avila | 2016-05-03 |
| 9324439 | Weak erase after programming to improve data retention in charge-trapping memory | Hong-Yan Chen, Ching-Huang Lu | 2016-04-26 |
| 9324418 | Nonvolatile memory and method for improved programming with reduced verify | Ken Oowada, Cynthia Hsu | 2016-04-26 |
| 9324419 | Multiple pass programming for memory with different program pulse widths | Liang Pang | 2016-04-26 |
| 9318206 | Selective word line erase in 3D non-volatile memory | Alex Mak, Seungpil Lee, Johann Alsmeier | 2016-04-19 |
| 9312010 | Programming of drain side word line to reduce program disturb and charge loss | Jiahui Yuan, Ching-Huang Lu, Wei Zhao | 2016-04-12 |
| 9312026 | Zoned erase verify in three dimensional nonvolatile memory | Mrinal Kochar, Gautam Dusija, Chris Avila, Man Lung Mui, Yichao Huang +1 more | 2016-04-12 |
| 9305648 | Techniques for programming of select gates in NAND memory | Hao Thai Nguyen, Man Lung Mui, Khanh Nguyen, Seungpil Lee, Toru Ishigaki | 2016-04-05 |
| RE45953 | Mitigating channel coupling effects during sensing of non-volatile storage elements | Yan Li, Cynthia Hsu | 2016-03-29 |
| 9299450 | Adaptive increase in control gate voltage of a dummy memory cell to compensate for inadvertent programming | Liang Pang, Zhengyi Zhang | 2016-03-29 |
| 9299443 | Modifying program pulses based on inter-pulse period to reduce program noise | Liang Pang, Jiahui Yuan | 2016-03-29 |
| 9286994 | Method of reducing hot electron injection type of read disturb in dummy memory cells | Hong-Yan Chen, Wei Zhao | 2016-03-15 |
| 9286987 | Controlling pass voltages to minimize program disturb in charge-trapping memory | Hong-Yan Chen | 2016-03-15 |
| RE45910 | Programming non-volatile storage including reducing impact from other memory cells | Shih-Chung Lee, Ken Oowada | 2016-03-01 |
| 9257191 | Charge redistribution during erase in charge trapping memory | Jiahui Yuan, Ching-Huang Lu | 2016-02-09 |
| 9245642 | Temperature dependent voltage to unselected drain side select transistor during program of 3D NAND | Jian Chen, Jiahui Yuan | 2016-01-26 |
| 9240238 | Back gate operation with elevated threshold voltage | Deepak Raghu, Gautam Dusija, Chris Avila, Man Lung Mui | 2016-01-19 |
| 9236131 | Bias to detect and prevent short circuits in three-dimensional memory device | Jiahui Yuan, Jayavel Pachamuthu, Wei Zhao | 2016-01-12 |
| 9229856 | Optimized configurable NAND parameters | Chris Avila, Man Lung Mui | 2016-01-05 |
| 9230656 | System for maintaining back gate threshold voltage in three dimensional NAND memory | Chris Avila, Gautam Dusija, Jian Chen, Man Lung Mui, Alexander Kwok-Tung Mak +1 more | 2016-01-05 |