Issued Patents All Time
Showing 101–125 of 152 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 8575000 | Copper interconnects separated by air gaps and method of making thereof | Vinod R. Purayath, Jayavel Pachamuthu, Jarrett Jun Liang, George Matamis | 2013-11-05 |
| 8546152 | Enhanced endpoint detection in non-volatile memory fabrication processes | Takashi Orimoto, George Matamis, Vinod R. Purayath | 2013-10-01 |
| 8520424 | Composition of memory cell with resistance-switching layers | Franz Kreupl, Abhijit Bandyopadhyay, Yung-Tin Chen, Chu-Chen Fu, Wipul Pemsiri Jayasekara +4 more | 2013-08-27 |
| 8492224 | Metal control gate structures and air gap isolation in non-volatile memory | Vinod R. Purayath, Tuan Pham, Hiroyuki Kinoshita, Yuan Zhang, Henry Chin +3 more | 2013-07-23 |
| 8461641 | Ultrahigh density vertical NAND memory device and method of making thereof | Johann Alsmeier, Vinod R. Purayath, Henry Chien, George Matamis, Yao-Sheng Lee +1 more | 2013-06-11 |
| 8455939 | Stacked metal fin cell | Johann Alsmeier, Vinod R. Purayath, George Matamis | 2013-06-04 |
| 8383479 | Integrated nanostructure-based non-volatile memory fabrication | Vinod R. Purayath, Masaaki Higashitani, Takashi Orimoto, George Matamis, Henry Chien | 2013-02-26 |
| 8330208 | Ultrahigh density monolithic three dimensional vertical NAND string memory device and method of making thereof | Johann Alsmeier, Vinod R. Purayath, Henry Chien, George Matamis, Yao-Sheng Lee +1 more | 2012-12-11 |
| 8263465 | Method of forming memory with floating gates including self-aligned metal nanodots using a coupling layer | Vinod R. Purayath, George Matamis, Takashi Orimoto, Tuan Pham | 2012-09-11 |
| 8222091 | Damascene method of making a nonvolatile memory device | Vinod R. Purayath, George Matamis, Takashi Orimoto | 2012-07-17 |
| 8207036 | Method for forming self-aligned dielectric cap above floating gate | Vinod R. Purayath, George Matamis, Takashi Orimoto, Henry Chien | 2012-06-26 |
| 8193055 | Method of forming memory with floating gates including self-aligned metal nanodots using a polymer solution | Vinod R. Purayath, George Matamis, Takashi Orimoto, Tuan Pham | 2012-06-05 |
| 8187936 | Ultrahigh density vertical NAND memory device and method of making thereof | Johann Alsmeier, Vinod R. Purayath, Henry Chien, George Matamis, Yao-Sheng Lee +1 more | 2012-05-29 |
| 8143156 | Methods of forming high density semiconductor devices using recursive spacer technique | George Matamis, Takashi Orimoto, Nima Mokhlesi | 2012-03-27 |
| 8105867 | Self-aligned three-dimensional non-volatile memory fabrication | George Matamis, Henry Chien, Takashi Orimoto, Vinod R. Purayath, Er-Xuan Ping +1 more | 2012-01-31 |
| 8097498 | Damascene method of making a nonvolatile memory device | Vinod R. Purayath, George Matamis, Takashi Orimoto | 2012-01-17 |
| 8030160 | Methods of forming NAND flash memory with fixed charge | Takashi Orimoto, George Matamis, Henry Chien | 2011-10-04 |
| 7960266 | Spacer patterns using assist layer for high density semiconductor devices | George Matamis, Tuan Pham, Masaaki Higashitani, Takashi Orimoto | 2011-06-14 |
| 7939407 | Composite charge storage structure formation in non-volatile memory using etch stop technologies | Vinod R. Purayath, George Matamis, Takashi Orimoto | 2011-05-10 |
| 7919809 | Dielectric layer above floating gate for reducing leakage current | Dana Lee, Henry Chin, Takashi Orimoto, Vinod R. Purayath, George Matamis | 2011-04-05 |
| 7915124 | Method of forming dielectric layer above floating gate for reducing leakage current | Dana Lee, Takashi Orimoto, Vinod R. Purayath, George Matamis, Henry Chin | 2011-03-29 |
| 7915664 | Non-volatile memory with sidewall channels and raised source/drain regions | Henry Chien, Takashi Orimoto, George Matamis, Vinod R. Purayath | 2011-03-29 |
| 7888210 | Non-volatile memory fabrication and isolation for composite charge storage structures | Vinod R. Purayath, George Matamis, Takashi Orimoto | 2011-02-15 |
| 7807529 | Lithographically space-defined charge storage regions in non-volatile memory | Vinod R. Purayath, George Matamis, Takashi Orimoto | 2010-10-05 |
| 7795080 | Methods of forming integrated circuit devices using composite spacer structures | Takashi Orimoto, George Matamis, Tuan Pham, Masaaki Higashitani, Henry Chien | 2010-09-14 |