Issued Patents All Time
Showing 26–50 of 182 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12001336 | Hybrid parallel programming of single-level cell memory | Umberto Siciliani, Walter Di Francesco | 2024-06-04 |
| 11953980 | Memory sub-system with dynamic calibration using component-based function(s) | Gerald L. Cadloni, Bruce A. Liikanen | 2024-04-09 |
| 11955175 | Copy redundancy in a key-value data storage system using content addressable memory | Tyler L. Betz, Tecla Ghilardi | 2024-04-09 |
| 11955204 | Apparatuses and methods for concurrently accessing different memory planes of a memory | Theodore T. Pekny, Jae-Kwan Park, Michele Incarnati, Luca De Santis | 2024-04-09 |
| 11908523 | Express programming using advanced cache register release in a memory sub-system | Walter Di Francesco, Umberto Siciliani | 2024-02-20 |
| 11899966 | Implementing fault tolerant page stripes on low density memory systems | Kishore Kumar Muchherla, Mark A. Helm, Giuseppina Puzzilli, Peter Feeley, Yifen Liu +2 more | 2024-02-13 |
| 11862257 | Managing programming convergence associated with memory cells of a memory sub-system | Jun Xu, Erwin E. Yu | 2024-01-02 |
| 11842774 | Memories for calibrating sensing of memory cell data states | Gianfranco Valeri, Walter Di-Francesco | 2023-12-12 |
| 11810613 | Ultra-compact page buffer | — | 2023-11-07 |
| 11776633 | Apparatus and methods for determining data states of memory cells | Ugo Russo, William C. Filipiak, Andrea D'Alessandro | 2023-10-03 |
| 11762767 | Storing highly read data at low impact read disturb pages of a memory device | Kishore Kumar Muchherla, Giuseppina Puzzilli, Vamsi Pavan Rayaprolu, Ashutosh Malshe, James Fitzpatrick +2 more | 2023-09-19 |
| 11721396 | Configuration of a memory device for programming memory cells | Purval S. Sule, Han Liu, Andrea D'Alessandro, Pranav Kalavade, Han Zhao +1 more | 2023-08-08 |
| 11715547 | Scan optimization using data selection across wordline of a memory array | Kishore Kumar Muchherla, Sead Zildzic, Junwyn A. Lacsao, Paing Z. Htet | 2023-08-01 |
| 11688474 | Dual verify for quick charge loss reduction in memory cells | Yingda Dong | 2023-06-27 |
| 11688466 | Bitline driver isolation from page buffer circuitry in memory device | Dheeraj Srinivasan, Andrea D'Alessandro | 2023-06-27 |
| 11688459 | Determining soft data | Andrea D'Alessandro, Andrea Giovanni Xotta | 2023-06-27 |
| 11662905 | Memory system performance enhancements using measured signal and noise characteristics of memory cells | James Fitzpatrick, Sivagnanam Parthasarathy, Patrick R. Khayat, AbdelHakim S. Alhussien | 2023-05-30 |
| 11636908 | Global-local read calibration | Walter Di Francesco, Kishore Kumar Muchherla, Vamsi Pavan Rayaprolu, Jeffrey S. McNeil | 2023-04-25 |
| 11605588 | Memory device including data lines on multiple device levels | Paolo Tessariol, Aaron Yip, Naveen Kaushik | 2023-03-14 |
| 11532367 | Managing programming convergence associated with memory cells of a memory sub-system | Jun Xu, Erwin E. Yu | 2022-12-20 |
| 11526393 | Memory sub-system with dynamic calibration using component-based function(s) | Gerald L. Cadloni, Bruce A. Liikanen | 2022-12-13 |
| 11475969 | Scan optimization using data selection across wordline of a memory array | Kishore Kumar Muchherla, Sead Zildzic, Junwyn A. Lacsao, Paing Z. Htet | 2022-10-18 |
| 11462250 | Apparatuses and methods for concurrently accessing different memory planes of a memory | Theodore T. Pekny, Jae-Kwan Park, Michele Incarnati, Luca de Santis | 2022-10-04 |
| 11450379 | Ultra-compact page buffer | — | 2022-09-20 |
| 11449271 | Implementing fault tolerant page stripes on low density memory systems | Kishore Kumar Muchherla, Mark A. Helm, Giuseppina Puzzilli, Peter Feeley, Yifen Liu +2 more | 2022-09-20 |