Issued Patents All Time
Showing 76–100 of 182 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10573379 | Determining soft data | Andrea D'Alessandro, Andrea Giovanni Xotta | 2020-02-25 |
| 10482974 | Operation of a memory device during programming | Purval S. Sule, Han Liu, Andrea D'Alessandro, Pranav Kalavade, Han Zhao +1 more | 2019-11-19 |
| 10446258 | Methods and apparatus for providing redundancy in memory | Giovanni Santin, Maria-Luisa Gallese, Luigi Pilolli | 2019-10-15 |
| 10430262 | Identifying asynchronous power loss | Michael G. Miller, Ashutosh Malshe, Peter Feeley, Gary F. Besinga, Sampath K. Ratnam +4 more | 2019-10-01 |
| 10346088 | Method and apparatus for per-deck erase verify and dynamic inhibit in 3d NAND | Niccolo′ Righetti, Akira Goda, Christian Caillat, Giuseppina Puzzilli | 2019-07-09 |
| 10303535 | Identifying asynchronous power loss | Michael G. Miller, Ashutosh Malshe, Peter Feeley, Gary F. Besinga, Sampath K. Ratnam +4 more | 2019-05-28 |
| 10242744 | Boosting channels of memory cells | Akira Goda, Mason Jones | 2019-03-26 |
| 10134481 | Pre-compensation of memory threshold voltage | Tommaso Vali, Andrea D'Alessandro, Mattia Cichocki, Michele Incarnati, Federica Paolini | 2018-11-20 |
| 10102903 | Write process for a non volatile memory device | Tommaso Vali, Andrea D'Alessandro, Pranav Kalavade | 2018-10-16 |
| 10083727 | Apparatuses and methods for concurrently accessing different memory planes of a memory | Theodore T. Pekny, Jae-Kwan Park, Michele Incarnati, Luca De Santis | 2018-09-25 |
| 10055293 | High performance memory controller | Walter Di Francesco, Luca De Santis, Giovanni Santin | 2018-08-21 |
| 10037807 | Boosting channels of memory cells | Akira Goda, Mason Jones | 2018-07-31 |
| 10037809 | Memory devices for reading memory cells of different memory planes | Mattia Cichocki, Tommaso Vali, Maria-Luisa Gallese, Umberto Siciliani | 2018-07-31 |
| 10014062 | Apparatus and methods for determining a pass/fail condition of a memory device | Giovanni Santin | 2018-07-03 |
| 9940193 | Chunk definition for partial-page read | Luigi Pilolli | 2018-04-10 |
| 9921898 | Identifying asynchronous power loss | Michael G. Miller, Ashutosh Malshe, Peter Feeley, Gary F. Besinga, Sampath K. Ratnam +4 more | 2018-03-20 |
| 9852065 | Method and apparatus for reducing data program completion overhead in NAND flash | Shantanu R. Rajwade, Andrea D'Alessandro, Pranav Kalavade | 2017-12-26 |
| 9779817 | Boosting channels of memory cells to reduce program disturb | Akira Goda, Mason Jones | 2017-10-03 |
| 9779826 | Memory devices for reading memory cells of different memory planes | Mattia Cichocki, Tommaso Vali, Maria-Luisa Gallese, Umberto Siciliani | 2017-10-03 |
| 9779839 | Methods for providing redundancy in a memory array comprising mapping portions of data associated with a defective address | Giovanni Santin, Maria-Luisa Gallese, Luigi Pilolli | 2017-10-03 |
| 9754674 | Concurrently reading first and second pages of memory cells having different page addresses | Mattia Cichocki, Tommaso Vali, Maria-Luisa Gallese, Umberto Siciliani | 2017-09-05 |
| 9691452 | Apparatuses and methods for concurrently accessing different memory planes of a memory | Theodore T. Pekny, Jae-Kwan Park, Michele Incarnati, Luca De Santis | 2017-06-27 |
| 9659639 | Threshold voltage analysis | William C. Filipiak | 2017-05-23 |
| 9646683 | Memory apparatus, systems, and methods | Tommaso Vali, Giovanni Naso, Vishal Sarin, William H. Radke, Theodore T. Pekny | 2017-05-09 |
| 9639420 | High performance memory controller | Walter Di Francesco, Luca De Santis, Giovanni Santin | 2017-05-02 |