CC

Christian Caillat

Micron: 12 patents #1,275 of 6,345Top 25%
IM Imec: 3 patents #122 of 687Top 20%
CEA: 1 patents #3,381 of 7,956Top 45%
SS Stmicroelectronics (Crolles 2) Sas: 1 patents #308 of 529Top 60%
SS Stmicroelectronics Sa: 1 patents #2,729 of 4,662Top 60%
IN Intel: 1 patents #18,218 of 30,777Top 60%
Overall (All Time): #228,016 of 4,157,543Top 6%
19
Patents All Time

Issued Patents All Time

Patent #TitleCo-InventorsDate
12288592 Performing sense operations in memory Michele Maria Venturini, Umberto Di Vincenzo, Ferdinando Bedeschi, Riccardo Muzzetto, Christophe Vincent Antoine Laurent 2025-04-29
12236992 Refresh determination using memory cell patterns Umberto Di Vincenzo, Ferdinando Bedeschi 2025-02-25
12219750 Memory device having 2-transistor vertical memory cell and separate read and write gates Eric Carman, Durai Vishak Nirmal Ramaswamy, Richard E. Fackenthal, Kamal M. Karda, Karthik Sarpatwari +2 more 2025-02-04
11778806 Memory device having 2-transistor vertical memory cell and separate read and write gates Eric Carman, Durai Vishak Nirmal Ramaswamy, Richard E. Fackenthal, Kamal M. Karda, Karthik Sarpatwari +2 more 2023-10-03
10504600 Apparatus configured to program memory cells using an intermediate level for multiple data states Carmine Miccoli, Akira Goda 2019-12-10
10346088 Method and apparatus for per-deck erase verify and dynamic inhibit in 3d NAND Niccolo′ Righetti, Akira Goda, Violante Moschiano, Giuseppina Puzzilli 2019-07-09
10153049 Erasing memory segments in a memory block of memory cells using select gate control line voltages Akira Goda 2018-12-11
10147494 Apparatus configured to program memory cells using an intermediate level for multiple data states Carmine Miccoli, Akira Goda 2018-12-04
9953718 Programming memory cells to be programmed to different levels to an intermediate level from a lowest level Carmine Miccoli, Akira Goda 2018-04-24
9779829 Erasing memory segments in a memory block of memory cells using select gate control line voltages Akira Goda 2017-10-03
9633719 Programming memory cells to be programmed to different levels to an intermediate level from a lowest level Carmine Miccoli, Akira Goda 2017-04-25
9245759 Method for manufacturing a dual work function semiconductor device Tom Schram, Alessio Spessot, Pierre C. Fazan, Lars-Ake Ragnarsson, Romain Ritzenthaler 2016-01-26
9093311 Techniques for providing a semiconductor memory device Michael A. Van Buskirk, Viktor Koldiaev, Jungtae Kwon, Pierre C. Fazan 2015-07-28
9076726 Method for tuning the effective work function of a gate structure in a semiconductor device Thomas Kauerauf, Alessio Spessot 2015-07-07
8748959 Semiconductor memory device Michael A. Van Buskirk, Viktor Koldiaev, Jungtae Kwon, Pierre C. Fazan 2014-06-10
8518793 Oxygen diffusion barrier comprising Ru Min Soo Kim, Johan Swerts 2013-08-27
7994560 Integrated circuit comprising a transistor and a capacitor, and fabrication method Richard Ferrant 2011-08-09
7008842 Process for fabricating a component, such as a capacitor in an integrated circuit, and integrated-circuit component Pascale Mazoyer 2006-03-07
6562687 MIS transistor and method for making same on a semiconductor substrate Simon Deleonibus, Georges Guegan, Fabien Coudert 2003-05-13