Issued Patents All Time
Showing 1–25 of 25 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 8518816 | Method for making electrical interconnections with carbon nanotubes | Paul-Henri Haumesser, Jean-Marie Basset, Paul M. Campbell, Thibaut Gutel, Gilles Marchand +1 more | 2013-08-27 |
| 8389368 | Method for producing a conductive nanoparticle memory device | Jean-Marie Basset, Paul M. Campbell, Thibaut Gutel, Paul-Henri Haumesser, Gilles Marchand +1 more | 2013-03-05 |
| 7820523 | Fabrication of active areas of different natures directly onto an insulator: application to the single or double gate MOS transistor | Francois Andrieu, Thomas Ernst | 2010-10-26 |
| 7678635 | Method of producing a transistor | Laurent Clavelier, Frédéric Mayer, Maud Vinet | 2010-03-16 |
| 7666733 | Method for making a vertical MOS transistor with embedded gate | — | 2010-02-23 |
| 7566922 | Field effect transistor with suitable source, drain and channel materials and integrated circuit comprising same | — | 2009-07-28 |
| 7553693 | Method for making a field effect transistor with diamond-like carbon channel and resulting transistor | — | 2009-06-30 |
| 7466019 | Rectangular semi-conducting support for microelectronics and method for making same | — | 2008-12-16 |
| 7425509 | Method for forming patterns aligned on either side of a thin film | Maud Vinet, Bernard Previtali, Gilles Fanget | 2008-09-16 |
| 7425496 | Method for delineating a conducting element disposed on an insulating layer, device and transistor thus obtained | — | 2008-09-16 |
| 7022562 | Field-effect transistor with horizontal self-aligned gates and the production method therefor | — | 2006-04-04 |
| 6998310 | Processes for making a single election transistor with a vertical channel | David Fraboulet | 2006-02-14 |
| 6955963 | Damascene architecture electronic storage and method for making same | Bernard Guillaumot | 2005-10-18 |
| 6867128 | Method for making an electronic component with self-aligned drain and gate, in damascene architecture | — | 2005-03-15 |
| 6787845 | Metal source and drain mos transistor | — | 2004-09-07 |
| 6727179 | Method for creating an integrated circuit stage wherein fine and large patterns coexist | — | 2004-04-27 |
| 6562687 | MIS transistor and method for making same on a semiconductor substrate | Georges Guegan, Christian Caillat, Fabien Coudert | 2003-05-13 |
| 6346450 | Process for manufacturing MIS transistor with self-aligned metal grid | Francois Martin | 2002-02-12 |
| 6150241 | Method for producing a transistor with self-aligned contacts and field insulation | — | 2000-11-21 |
| 6091076 | Quantum WELL MOS transistor and methods for making same | — | 2000-07-18 |
| 5973365 | MOS transistor and lateral insulating method of a MOS transistor active region | — | 1999-10-26 |
| 5913136 | Process for making a transistor with self-aligned source and drain contacts | — | 1999-06-15 |
| 5897939 | Substrate of the silicon on insulator type for the production of transistors and preparation process for such a substrate | — | 1999-04-27 |
| 5314832 | Process for the production of a high voltage MIS integrated circuit | — | 1994-05-24 |
| 4592802 | Method of fabrication of aluminum contacts through a thick insulating layer in an integrated circuit | Guy Dubois | 1986-06-03 |