Issued Patents All Time
Showing 25 most recent of 48 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12268011 | Pillar select transistor for 3-dimensional cross point memory | Prashant Majhi, Derchang Kau | 2025-04-01 |
| 11195575 | Memory array with shorting structure on a dummy array thereof, and method of providing same | Jaydip Bharatkumar Patel, Everardo Torres Flores, Khaled Hasnat | 2021-12-07 |
| 9837604 | Phase-change memory cell implant for dummy array leakage reduction | Lequn Liu, Ugo Russo | 2017-12-05 |
| 9608042 | Electrode configurations to increase electro-thermal isolation of phase-change memory elements and associated techniques | Fabio Pellizzer, Giulio Albini, Stephen W. Russell, Sanjay Rangan | 2017-03-28 |
| 9559146 | Phase-change memory cell implant for dummy array leakage reduction | Lequn Liu, Ugo Russo | 2017-01-31 |
| 9299747 | Electrode configurations to increase electro-thermal isolation of phase-change memory elements and associated techniques | Fabio Pellizzer, Giulio Albini, Stephen W. Russell, Sanjay Rangan | 2016-03-29 |
| 9231202 | Thermal-disturb mitigation in dual-deck cross-point memories | Kiran Pangal | 2016-01-05 |
| 9082714 | Use of etch process post wordline definition to improve data retention in a flash memory device | Randy J. Koval, Ronald A. Weimer, Vinayak Shamanna, Thomas M. Graettinger, William Kueber +2 more | 2015-07-14 |
| 8809198 | Nano-crystal etch process | Ramakanth Alapati, Paul A. Morgan | 2014-08-19 |
| 8673787 | Method to reduce charge buildup during high aspect ratio contact etch | Gurtej S. Sandhu, Daniel A. Steckert, Jingyi Bai, Shane J. Trapp, Tony Schrock | 2014-03-18 |
| 8568900 | Methods for forming an enriched metal oxide surface | Stephen W. Russell | 2013-10-29 |
| 7985692 | Method to reduce charge buildup during high aspect ratio contact etch | Gurtej S. Sandhu, Daniel A. Steckert, Jingyi Bai, Shane J. Trapp, Tony Schrock | 2011-07-26 |
| 7659210 | Nano-crystal etch process | Ramakanth Alapati, Paul A. Morgan | 2010-02-09 |
| 7615164 | Plasma etching methods and contact opening forming methods | Bradley J. Howard | 2009-11-10 |
| 7396774 | Methods for forming an enriched metal oxide surface | Stephen W. Russell | 2008-07-08 |
| 7344975 | Method to reduce charge buildup during high aspect ratio contact etch | Gurtej S. Sandhu, Daniel A. Steckert, Jingyi Bai, Shane J. Trapp, Tony Schrock | 2008-03-18 |
| 7319071 | Methods for forming a metallic damascene structure | Stephen W. Russell | 2008-01-15 |
| 7293526 | Plasma reaction chamber liner consisting essentially of osmium | Li Li | 2007-11-13 |
| 7255803 | Method of forming contact openings | Bradley J. Howard | 2007-08-14 |
| 7211849 | Protective layers for MRAM devices | Karen Signorini, Brad J. Howard | 2007-05-01 |
| 7166543 | Methods for forming an enriched metal oxide surface for use in a semiconductor device | Stephen W. Russell | 2007-01-23 |
| 7135444 | Cleaning composition useful in semiconductor integrated circuit fabrication | Donald L. Yates | 2006-11-14 |
| 7131391 | Plasma reaction chamber liner comprising ruthenium | Li Li | 2006-11-07 |
| 7118683 | Methods of etching silicon-oxide-containing compositions | Li Li | 2006-10-10 |
| 7087561 | Cleaning composition useful in semiconductor integrated circuit fabrication | Donald L. Yates | 2006-08-08 |