Patent Leaderboard
USPTO Patent Rankings Data through Dec 31, 2025
FP

Fabio Pellizzer — 289 Patents

Micron: 233 patents #27 of 6,374Top 1%
SSStmicroelectronics Sa: 23 patents #183 of 4,662Top 4%
OVOvonyx: 16 patents #9 of 96Top 10%
Intel: 13 patents #3,167 of 30,777Top 15%
OTOvonyx Memory Technology: 6 patents #3 of 30Top 10%
MTMircon Technology: 1 patents #1 of 36Top 3%
Boise, ID: #9 of 3,546 inventorsTop 1%
Idaho: #13 of 8,810 inventorsTop 1%
Overall (All Time): #1,454 of 4,157,543Top 1%
289 Patents All Time
Fabio Pellizzer has been granted 289 US patents while listed as an inventor at Micron. The first was granted in 2004 and the most recent in December 2025. Fabio Pellizzer ranks #1,454 of 4,157,543 US inventors in our database (top 0.03%). Patent records list Fabio Pellizzer in Boise, ID, US.

Issued Patents All Time

Showing 1–25 of 289 patents

Patent #TitleCo-InventorsDateApprox Value ⓘ
12512146 Decoding architecture for memory devices Paolo Fantini, Enrico Varesi, Lorenzo Fratin 2025-12-30
12462870 Reading a multi-level memory cell Mattia Robustelli, Innocenzo Tortorelli, Agostino Pirovano 2025-11-04
12408332 Memory devices having one-time-programmable fuses and/or antifuses formed from thin-film transistors Paolo Fantini, Lorenzo Fratin 2025-09-02
12374393 Varying-polarity read operations for polarity-written memory cells Innocenzo Tortorelli, Hari Giduturi 2025-07-29
12367933 Unipolar programming of memory cells Innocenzo Tortorelli, Mattia Robustelli, Alessandro Sebastiani, Matteo Impalà 2025-07-22
12349371 Vertical memory architecture Agostino Pirovano 2025-07-01
12336193 Devices including a passive material between memory cells and conductive access lines, and related electronic devices Innocenzo Tortorelli 2025-06-17
12283316 Cross-point pillar architecture for memory arrays Innocenzo Tortorelli, Mattia Robustelli, Alessandro Sebastiani 2025-04-22
12236999 Decoder architectures for three-dimensional memory devices Lorenzo Fratin, Paolo Fantini 2025-02-25
12219883 Techniques for forming self-aligned memory structures Stephen W. Russell, Andrea Redaelli, Innocenzo Tortorelli, Agostino Pirovano, Lorenzo Fratin 2025-02-04
12219784 Memory device and method for manufacturing the same Lorenzo Fratin, Paolo Fantini 2025-02-04
12219782 Folded access line for memory cell access in a memory device Srivatsan Venkatesan 2025-02-04
12178054 Split pillar architectures for memory devices Paolo Fantini, Lorenzo Fratin 2024-12-24 $36,268,000
12176042 Operating a chalcogenide memory with vertical word and vertical word switching elements Agostino Pirovano, Innocenzo Tortorelli 2024-12-24 $36,268,000
12171105 Memory device with a split pillar architecture Lorenzo Fratin, Paolo Fantini 2024-12-17 $47,790,000
12148467 Decoding for a memory device Paolo Fantini, Lorenzo Fratin 2024-11-19 $41,420,000
12150317 Memory device and method for manufacturing the same Lorenzo Fratin, Paolo Fantini 2024-11-19 $41,420,000
12100447 Self-selecting memory array with horizontal access lines Lorenzo Fratin, Agostino Pirovano, Russell L. Meyer 2024-09-24 $58,106,000
12082513 Memory cells with asymmetrical electrode interfaces Agostino Pirovano, Kolya Yastrebenetsky, Anna Maria Conti 2024-09-03 $19,072,000
12080359 Identify the programming mode of memory cells during reading of the memory cells Karthik Sarpatwari, Nevil N. Gajera 2024-09-03 $19,072,000
12026601 Stacked artificial neural networks 2024-07-02 $50,597,000
11996141 Reading a multi-level memory cell Mattia Robustelli, Innocenzo Tortorelli, Agostino Pirovano 2024-05-28 $28,459,000
11923002 Varying-polarity read operations for polarity-written memory cells Innocenzo Tortorelli, Hari Giduturi 2024-03-05 $17,899,000
11923007 Dirty write on power off Karthik Sarpatwari, Jessica Chen, Nevil N. Gajera 2024-03-05 $17,899,000
11894103 Decoding architecture for word line tiles Paolo Fantini, Lorenzo Fratin, Enrico Varesi 2024-02-06 $27,923,000