Issued Patents All Time
Showing 25 most recent of 50 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12374393 | Varying-polarity read operations for polarity-written memory cells | Innocenzo Tortorelli, Fabio Pellizzer | 2025-07-29 |
| 12362013 | Pre-decoder circuitry | Vijayakrishna J. Vankayala, Jeffrey E. Koelling, Mingdong Cui, Ramachandra Rao Jogu | 2025-07-15 |
| 12254948 | Standby exit for memory die stack | — | 2025-03-18 |
| 12176031 | Divided clock transmission in a three-dimensional stacked memory device | Vijayakrishna J. Vankayala, Jason M. Brown | 2024-12-24 |
| 12051463 | Decoder architecture for memory device | Ferdinando Bedeschi, Jeffrey E. Koelling, Riccardo Muzzetto, Corrado Villa | 2024-07-30 |
| 12020743 | Memory device architecture using multiple physical cells per bit to improve read margin and to alleviate the need for managing demarcation read voltages | Joseph M. McCrate, Robert J. Gleixner, Ramin Ghodsi | 2024-06-25 |
| 12014765 | Intra-package memory die communication structures | — | 2024-06-18 |
| 12008236 | Tuned datapath in stacked memory device | Bret Johnson | 2024-06-11 |
| 11972147 | Memory die stack chip id-based command structure | — | 2024-04-30 |
| 11967373 | Pre-decoder circuitry | Vijayakrishna J. Vankayala, Jeffrey E. Koelling, Mingdong Cui, Ramachandra Rao Jogu | 2024-04-23 |
| 11960744 | Register operation in memory devices | — | 2024-04-16 |
| 11923002 | Varying-polarity read operations for polarity-written memory cells | Innocenzo Tortorelli, Fabio Pellizzer | 2024-03-05 |
| 11900999 | Memory cycling tracking for threshold voltage variation systems and methods | — | 2024-02-13 |
| 11887665 | Memory cell programming that cancels threshold voltage drift | — | 2024-01-30 |
| 11776625 | Boost-assisted memory cell selection in a memory array | Mingdong Cui, Hongmei Wang | 2023-10-03 |
| 11769552 | Ramp-based biasing and adjusting of access line voltage in a memory device | — | 2023-09-26 |
| 11762443 | Power management for memory device | — | 2023-09-19 |
| 11763910 | Multi-command memory accesses | — | 2023-09-19 |
| 11749342 | Passive compensation for electrical distance | John Fredric Schreck | 2023-09-05 |
| 11605418 | Memory device architecture using multiple physical cells per bit to improve read margin and to alleviate the need for managing demarcation read voltages | Joseph M. McCrate, Robert J. Gleixner, Ramin Ghodsi | 2023-03-14 |
| 11527286 | Voltage drivers with reduced power consumption during polarity transition | Mingdong Cui, Nathan Joseph Sirocka | 2022-12-13 |
| 11430509 | Varying-polarity read operations for polarity-written memory cells | Innocenzo Tortorelli, Fabio Pellizzer | 2022-08-30 |
| 11398276 | Decoder architecture for memory device | Ferdinando Bedeschi, Jeffrey E. Koelling, Riccardo Muzzetto, Corrado Villa | 2022-07-26 |
| 11380411 | Threshold voltage drift tracking systems and methods | — | 2022-07-05 |
| 11348637 | Electrical distance-based remapping in a memory device | — | 2022-05-31 |