Patent Leaderboard
USPTO Patent Rankings Data through Dec 31, 2025
RG

Robert J. Gleixner — 23 Patents

Micron: 19 patents #940 of 6,374Top 15%
Intel: 4 patents #8,538 of 30,777Top 30%
San Jose, CA: #2,796 of 32,062 inventorsTop 9%
California: #24,547 of 386,348 inventorsTop 7%
Overall (All Time): #178,160 of 4,157,543Top 5%
23 Patents All Time
Robert J. Gleixner has been granted 23 US patents while listed as an inventor at Micron. The first was granted in 2004 and the most recent in October 2024. Robert J. Gleixner ranks #178,160 of 4,157,543 US inventors in our database (top 4.3%). Patent records list Robert J. Gleixner in San Jose, CA, US.

Patents per Year

Patents granted per year, 2004 to 2024Bar chart with a peak of 9 patents in 2023.peak 92004: 1 patents20042005: 1 patents20052008: 1 patents20082010: 1 patents20102011: 1 patents20112021: 1 patents20212022: 4 patents20222023: 9 patents20232024: 4 patents2024

Issued Patents All Time

Showing 1–23 of 23 patents

Patent #TitleCo-InventorsDateApprox Value ⓘ
12131778 Triggering of stronger write pulses in a memory device based on prior read operations Zhongyuan Lu 2024-10-29 $30,986,000
12020743 Memory device architecture using multiple physical cells per bit to improve read margin and to alleviate the need for managing demarcation read voltages Joseph M. McCrate, Hari Giduturi, Ramin Ghodsi 2024-06-25 $27,776,000
11978513 Generating patterns for memory threshold voltage difference Zhongyuan Lu 2024-05-07 $32,619,000
11868211 Error detection and correction in memory Joseph M. McCrate 2024-01-09 $10,439,000
11823745 Predicting and compensating for degradation of memory cells Zhongyuan Lu 2023-11-21 $23,209,000
11823761 Pre-read in opposite polarity to evaluate read margin Zhongyuan Lu 2023-11-21 $23,209,000
11735258 Increase of a sense current in memory Zhongyuan Lu, Karthik Sarpatwari 2023-08-22 $9,108,000
11710517 Write operation techniques for memory systems Zhongyuan Lu, Christina Papagianni, Hongmei Wang 2023-07-25 $13,773,000
11711987 Memory electrodes and formation thereof Joseph M. McCrate 2023-07-25 $13,773,000
11705195 Increase of a sense current in memory Zhongyuan Lu 2023-07-18 $8,312,000
11651825 Random value generator Zhongyuan Lu, Hongmei Wang 2023-05-16 $14,212,000
11605418 Memory device architecture using multiple physical cells per bit to improve read margin and to alleviate the need for managing demarcation read voltages Joseph M. McCrate, Hari Giduturi, Ramin Ghodsi 2023-03-14 $12,786,000
11568932 Read cache for reset read disturb mitigation Zhongyuan Lu, Stephen H. Tang 2023-01-31 $12,340,000
11455210 Error detection and correction in memory Joseph M. McCrate 2022-09-27 $13,053,000
11456036 Predicting and compensating for degradation of memory cells Zhongyuan Lu 2022-09-27 $13,053,000
11295811 Increase of a sense current in memory Zhongyuan Lu, Karthik Sarpatwari 2022-04-05 $17,375,000
11244717 Write operation techniques for memory systems Zhongyuan Lu, Christina Papagianni, Hongmei Wang 2022-02-08 $27,820,000
11211122 Increase of a sense current in memory Zhongyuan Lu 2021-12-28 $20,140,000
8036016 Maintenance process to enhance memory endurance Joy Sarker 2011-10-11 $2,134,000
7855103 Wirebond structure and method to connect to a microelectronic die Donald Danielson, Patrick M. Paluda, Rajan Naik 2010-12-21 $32,423,000
7393772 Wirebond structure and method to connect to a microelectronic die Donald Danielson, Patrick M. Paluda, Rajan Naik 2008-07-01 $20,189,000
6924554 Wirebond structure and method to connect to a microelectronic die Donald Danielson, Patrick M. Paluda, Rajan Naik 2005-08-02 $20,766,000
6683383 Wirebond structure and method to connect to a microelectronic die Donald Danielson, Patrick M. Paluda, Rajan Naik 2004-01-27 $81,098,000