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Back side illuminated CMOS image sensor arrays |
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Back side illuminated CMOS image sensor arrays |
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Global shutter pixel with improved efficiency |
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2014-11-04 |
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2014-03-18 |
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Integrated circuit having pitch reduced patterns relative to photoithography features |
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Pitch reduced patterns relative to photolithography features |
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2012-03-06 |
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Multiple deposition for integration of spacers in pitch multiplication process |
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Pitch reduced patterns relative to photolithography features |
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Pitch reduced patterns relative to photolithography features |
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Method to reduce charge buildup during high aspect ratio contact etch |
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Multiple deposition for integration of spacers in pitch multiplication process |
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2011-02-08 |
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Pitch reduced patterns relative to photolithography features |
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Multiple deposition for integration of spacers in pitch multiplication process |
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2008-06-24 |
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Method to reduce charge buildup during high aspect ratio contact etch |
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Prevention of photoresist scumming |
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2007-08-21 |
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Pitch reduced patterns relative to photolithography features |
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2007-02-13 |
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2006-01-03 |