Issued Patents All Time
Showing 1–21 of 21 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12424483 | 3D NAND with inter-wordline airgap | Vijay Saradhi Mangu, David S. Meyaard, Krishna K. Parat | 2025-09-23 |
| 11798633 | Methods and apparatuses including an asymmetric assist device | Hiroyuki Sanda | 2023-10-24 |
| 11626424 | Semiconductor devices and methods of fabrication | Hongbin Zhu, Zhenyu Lu, Gordon A. Haller, Jie Sun, John D. Hopkins | 2023-04-11 |
| 11088168 | Semiconductor devices and methods of fabrication | Hongbin Zhu, Zhenyu Lu, Gordon A. Haller, Jie Sun, John D. Hopkins | 2021-08-10 |
| 11037633 | Methods and apparatuses including an asymmetric assist device | Hiroyuki Sanda | 2021-06-15 |
| 10825831 | Non-volatile memory with storage nodes having a radius of curvature | Henok T. MEBRAHTU, Krishna K. Parat | 2020-11-03 |
| 10622450 | Modified floating gate and dielectric layer geometry in 3D memory arrays | Srikant Jayanti, Hiroyuki Sanda, Meng-Wei Kuo, Srivardhan Gowda, Krishna K. Parat | 2020-04-14 |
| 10608004 | Semiconductor devices and methods of fabrication | Hongbin Zhu, Zhenyu Lu, Gordon A. Haller, Jie Sun, John D. Hopkins | 2020-03-31 |
| 10297325 | Methods and apparatuses including an asymmetric assist device | Hiroyuki Sanda | 2019-05-21 |
| 10128262 | Vertical memory having varying storage cell design through the storage cell stack | Hiroyuki Sanda | 2018-11-13 |
| 10038002 | Semiconductor devices and methods of fabrication | Hongbin Zhu, Zhenyu Lu, Gordon A. Haller, Jie Sun, John D. Hopkins | 2018-07-31 |
| 9953842 | Methods of forming a portion of a memory array having a conductor having a variable concentration of germanium | — | 2018-04-24 |
| 9875801 | Methods and apparatuses including an asymmetric assist device | Hiroyuki Sanda | 2018-01-23 |
| 9722074 | Local buried channel dielectric for vertical NAND performance enhancement and vertical scaling | Fatma Arzum Simsek-Ege | 2017-08-01 |
| 9698022 | Self-aligned floating gate in a vertical memory structure | — | 2017-07-04 |
| 9666449 | Conductors having a variable concentration of germanium for governing removal rates of the conductor during control gate formation | — | 2017-05-30 |
| 9443864 | Self-aligned floating gate in a vertical memory structure | — | 2016-09-13 |
| 9196625 | Self-aligned floating gate in a vertical memory structure | — | 2015-11-24 |
| 9190490 | Local buried channel dielectric for vertical NAND performance enhancement and vertical scaling | Fatma Arzum Simsek-Ege | 2015-11-17 |
| 9082714 | Use of etch process post wordline definition to improve data retention in a flash memory device | Max Hineman, Ronald A. Weimer, Vinayak Shamanna, Thomas M. Graettinger, William Kueber +2 more | 2015-07-14 |
| 8878279 | Self-aligned floating gate in a vertical memory structure | — | 2014-11-04 |