Issued Patents All Time
Showing 25 most recent of 32 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10539611 | Integrated circuit chip reliability qualification using a sample-specific expected fail rate | Jeanne P. Bickford, Nazmul Habib, Baozhen Li | 2020-01-21 |
| 10216870 | Methodology to prevent metal lines from current pulse damage | Jeanne P. Bickford, Nazmul Habib, Baozhen Li | 2019-02-26 |
| 10169500 | Critical path delay prediction | Margaret R. Charlebois, Rashmi D. Chatty, Christopher D. Hanudel, Robert D. Herzl, David W. Milton +2 more | 2019-01-01 |
| 10006964 | Chip performance monitoring system and method | Margaret R. Charlebois, Christopher D. Hanudel, Robert D. Herzl, David W. Milton, Clarence R. Ogilvie +1 more | 2018-06-26 |
| 9940430 | Burn-in power performance optimization | Jeanne P. Bickford, Nazmul Habib, Baozhen Li | 2018-04-10 |
| 9891275 | Integrated circuit chip reliability qualification using a sample-specific expected fail rate | Jeanne P. Bickford, Nazmul Habib, Baozhen Li | 2018-02-13 |
| 9791502 | On-chip usable life depletion meter and associated method | Jeanne P. Bickford, Nazmul Habib, Baozhen Li | 2017-10-17 |
| 9639645 | Integrated circuit chip reliability using reliability-optimized failure mechanism targeting | Jeanne P. Bickford, Nazmul Habib, Baozhen Li | 2017-05-02 |
| 9625325 | System and method for identifying operating temperatures and modifying of integrated circuits | Jeanne P. Bickford, Nazmul Habib, Baozhen Li | 2017-04-18 |
| 9618566 | Systems and methods to prevent incorporation of a used integrated circuit chip into a product | Jeanne P. Bickford, Nazmul Habib, Baozhen Li | 2017-04-11 |
| 9489482 | Reliability-optimized selective voltage binning | Jeanne P. Bickford, Nazmul Habib, Baozhen Li | 2016-11-08 |
| 9383766 | Chip performance monitoring system and method | Margaret R. Charlebois, Christopher D. Hanudel, Robert D. Herzl, David W. Milton, Clarence R. Ogilvie +1 more | 2016-07-05 |
| 9188643 | Flexible performance screen ring oscillator within a scan chain | Margaret R. Charlebois, Christopher D. Hanudel, Robert D. Herzl, David W. Milton, Clarence R. Ogilvie +1 more | 2015-11-17 |
| 9157956 | Adaptive power control using timing canonicals | Jeanne P. Bickford, Eric A. Foreman, Peter A. Habitz, Jeffrey G. Hemmett, Clarence R. Ogilvie +1 more | 2015-10-13 |
| 9128151 | Performance screen ring oscillator formed from paired scan chains | Margaret R. Charlebois, Christopher D. Hanudel, Robert D. Herzl, David W. Milton, Clarence R. Ogilvie +1 more | 2015-09-08 |
| 9097765 | Performance screen ring oscillator formed from multi-dimensional pairings of scan chains | Margaret R. Charlebois, Christopher D. Hanudel, Robert D. Herzl, David W. Milton, Clarence R. Ogilvie +1 more | 2015-08-04 |
| 8754696 | Ring oscillator | Margaret R. Charlebois, Rashmi D. Chatty, Christopher D. Hanudel, Robert D. Herzl, David W. Milton +3 more | 2014-06-17 |
| 8464199 | Circuit design using design variable function slope sensitivity | Margaret R. Charlebois, Christopher D. Hanudel, Robert D. Herzl, David W. Milton, Clarence R. Ogilvie +1 more | 2013-06-11 |
| 8381050 | Method and apparatus for increased effectiveness of delay and transition fault testing | Pamela S. Gillis, Jack R. Smith, Francis Woytowich, Tian Xia | 2013-02-19 |
| 8341588 | Semiconductor layer forming method and structure | Robert D. Herzl, Robert S. Horton, Kenneth A. Lauricella, David W. Milton, Clarence R. Ogilvie +3 more | 2012-12-25 |
| 8302063 | Method and system to optimize semiconductor products for power, performance, noise, and cost through use of variable power supply voltage compression | Jeanne P. Bickford, Umberto Garofano, James E. Jasmin, Ivan L. Wemple | 2012-10-30 |
| 8181148 | Method for identifying and implementing flexible logic block logic for easy engineering changes | Robert D. Herzl, Robert S. Horton, Kenneth A. Lauricella, David W. Milton, Clarence R. Ogilvie +3 more | 2012-05-15 |
| 8141028 | Structure for identifying and implementing flexible logic block logic for easy engineering changes | Robert D. Herzl, Robert S. Horton, Kenneth A. Lauricella, David W. Milton, Clarence R. Ogilvie +3 more | 2012-03-20 |
| 8086988 | Chip design and fabrication method optimized for profit | Nathan C. Buck, Howard H. Chen, James Eckhardt, Eric A. Foreman, James C. Gregerson +3 more | 2011-12-27 |
| 8060845 | Minimizing impact of design changes for integrated circuit designs | Robert D. Herzl, Robert S. Horton, Kenneth A. Lauricella, David W. Milton, Clarence R. Ogilvie +3 more | 2011-11-15 |