Issued Patents All Time
Showing 25 most recent of 31 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 11221957 | Promotion of ERAT cache entries | Bartholomew Blaner, Jay G. Heaslip, Benjamin Herrenschmidt, Jody B. Joyner, Jon K. Kriegel +1 more | 2022-01-11 |
| 10884943 | Speculative checkin of ERAT cache entries | Bartholomew Blaner, Jay G. Heaslip, Jody B. Joyner, Jeffrey A. Stuecheli | 2021-01-05 |
| 10599569 | Maintaining consistency between address translations in a data processing system | Bartholomew Blaner, Jay G. Heaslip, Jody B. Joyner | 2020-03-24 |
| 10169500 | Critical path delay prediction | Margaret R. Charlebois, Rashmi D. Chatty, Christopher D. Hanudel, David W. Milton, Clarence R. Ogilvie +2 more | 2019-01-01 |
| 10006964 | Chip performance monitoring system and method | Margaret R. Charlebois, Christopher D. Hanudel, David W. Milton, Clarence R. Ogilvie, Paul M. Schanely +1 more | 2018-06-26 |
| 9383766 | Chip performance monitoring system and method | Margaret R. Charlebois, Christopher D. Hanudel, David W. Milton, Clarence R. Ogilvie, Paul M. Schanely +1 more | 2016-07-05 |
| 9286129 | Termination of requests in a distributed coprocessor system | Brian Mitchell Bass, Bartholomew Blaner, Jay G. Heaslip, Kenneth A. Lauricella, Ross Boyd Leavens | 2016-03-15 |
| 9188643 | Flexible performance screen ring oscillator within a scan chain | Margaret R. Charlebois, Christopher D. Hanudel, David W. Milton, Clarence R. Ogilvie, Paul M. Schanely +1 more | 2015-11-17 |
| 9128151 | Performance screen ring oscillator formed from paired scan chains | Margaret R. Charlebois, Christopher D. Hanudel, David W. Milton, Clarence R. Ogilvie, Paul M. Schanely +1 more | 2015-09-08 |
| 9097765 | Performance screen ring oscillator formed from multi-dimensional pairings of scan chains | Margaret R. Charlebois, Christopher D. Hanudel, David W. Milton, Clarence R. Ogilvie, Paul M. Schanely +1 more | 2015-08-04 |
| 8754696 | Ring oscillator | Margaret R. Charlebois, Rashmi D. Chatty, Christopher D. Hanudel, David W. Milton, Clarence R. Ogilvie +3 more | 2014-06-17 |
| 8667223 | Shadow registers for least recently used data in cache | Thomas Chadwick, Kenneth A. Lauricella, Arnold S. Tran | 2014-03-04 |
| 8464199 | Circuit design using design variable function slope sensitivity | Margaret R. Charlebois, Christopher D. Hanudel, David W. Milton, Clarence R. Ogilvie, Paul M. Schanely +1 more | 2013-06-11 |
| 8341588 | Semiconductor layer forming method and structure | Robert S. Horton, Kenneth A. Lauricella, David W. Milton, Clarence R. Ogilvie, Paul M. Schanely +3 more | 2012-12-25 |
| 8181148 | Method for identifying and implementing flexible logic block logic for easy engineering changes | Robert S. Horton, Kenneth A. Lauricella, David W. Milton, Clarence R. Ogilvie, Paul M. Schanely +3 more | 2012-05-15 |
| 8141028 | Structure for identifying and implementing flexible logic block logic for easy engineering changes | Robert S. Horton, Kenneth A. Lauricella, David W. Milton, Clarence R. Ogilvie, Paul M. Schanely +3 more | 2012-03-20 |
| 8060845 | Minimizing impact of design changes for integrated circuit designs | Robert S. Horton, Kenneth A. Lauricella, David W. Milton, Clarence R. Ogilvie, Paul M. Schanely +3 more | 2011-11-15 |
| 7917348 | Method of switching external models in an automated system-on-chip integrated circuit design verification system | Robert J. Devins, David W. Milton | 2011-03-29 |
| 7480888 | Design structure for facilitating engineering changes in integrated circuits | Clarence R. Ogilvie, Charles B. Winn, David W. Milton, Kenneth A. Lauricella, Nitin Sharma +4 more | 2009-01-20 |
| 7353156 | Method of switching external models in an automated system-on-chip integrated circuit design verification system | Robert J. Devins, David W. Milton | 2008-04-01 |
| 6868545 | Method for re-using system-on-chip verification software in an operating system | Robert J. Devins, Paul G. Ferro, Kenneth A. Mahler | 2005-03-15 |
| 6615167 | Processor-independent system-on-chip verification for embedded processor systems | Robert J. Devins, Paul G. Ferro | 2003-09-02 |
| 6539522 | Method of developing re-usable software for efficient verification of system-on-chip integrated circuit designs | Robert J. Devins, Paul G. Ferro, Mark E. Kautzman, Kenneth A. Mahler, David W. Milton | 2003-03-25 |
| 6487699 | Method of controlling external models in system-on-chip verification | Robert J. Devins, David W. Milton, Clarence R. Ogilvie | 2002-11-26 |
| 6157981 | Real time invariant behavior cache | Bartholomew Blaner, Henry Harvey Burkhart, Kenneth A. Lauricella, Clarence R. Ogilvie, Arnold S. Tran | 2000-12-05 |