AT

Arnold S. Tran

IBM: 10 patents #10,888 of 70,183Top 20%
Overall (All Time): #514,884 of 4,157,543Top 15%
10
Patents All Time

Issued Patents All Time

Patent #TitleCo-InventorsDate
9201654 Processor and data processing method incorporating an instruction pipeline with conditional branch direction prediction for fast access to branch target instructions Jason F. Cantin, Jack R. Smith, Kenichi Tsuchiya 2015-12-01
8667223 Shadow registers for least recently used data in cache Thomas Chadwick, Robert D. Herzl, Kenneth A. Lauricella 2014-03-04
8108609 Structure for implementing dynamic refresh protocols for DRAM based cache John E. Barth, Jr., Philip G. Emma, Erik L. Hedberg, Hillery C. Hunter, Peter A. Sandon +1 more 2012-01-31
8024513 Method and system for implementing dynamic refresh protocols for DRAM based cache John E. Barth, Jr., Philip G. Emma, Erik L. Hedberg, Hillery C. Hunter, Peter A. Sandon +1 more 2011-09-20
7962695 Method and system for integrating SRAM and DRAM architecture in set associative cache Marc R. Faucher, Hillery C. Hunter, William Robert Reohr, Peter A. Sandon, Vijayalakshmi Srinivasan 2011-06-14
7882302 Method and system for implementing prioritized refresh of DRAM based cache Marc R. Faucher, Peter A. Sandon 2011-02-01
6857065 System and method for system initializating a data processing system by selecting parameters from one of a user-defined input, a serial non-volatile memory and a parallel non-volatile memory Bartholomew Blaner 2005-02-15
6157981 Real time invariant behavior cache Bartholomew Blaner, Henry Harvey Burkhart, Robert D. Herzl, Kenneth A. Lauricella, Clarence R. Ogilvie 2000-12-05
5930832 Apparatus to guarantee TLB inclusion for store operations Jay G. Heaslip, Robert D. Herzl 1999-07-27
5319761 Directory look-aside table for a virtual storage system including means for minimizing synonym entries Kevin Arthur Chiarot, Richard J. Schmalz, Theodore J. Schmitt, Shih-Hsiung S. Tung 1994-06-07