| 11366154 |
Enabling of functional logic in IC using thermal sequence enabling test |
Sebastian T. Ventrone, Richard S. Graf, Ezra D. B. Hall |
2022-06-21 |
$49,607,000 |
| 9299590 |
Integrated micro-peltier cooling components in silicon-on-insulator (SOI) layers |
Richard S. Graf, Ezra D. B. Hall, Vibhor Jain, Sebastian T. Ventrone |
2016-03-29 |
$707,000 |
| 9201654 |
Processor and data processing method incorporating an instruction pipeline with conditional branch direction prediction for fast access to branch target instructions |
Jason F. Cantin, Arnold S. Tran, Kenichi Tsuchiya |
2015-12-01 |
$5,130,000 |
| 8988140 |
Real-time adaptive voltage control of logic blocks |
Richard S. Graf, Joseph A. Iadanza, Faraydon Pakbaz, Sebastian T. Ventrone, Ivan L. Wemple |
2015-03-24 |
$3,177,000 |
| 8899620 |
Rollover protection structure |
Sahil Bhardwaj |
2014-12-02 |
|
| 8756549 |
Integrated circuit chip incorporating embedded thermal radiators for localized, on-demand, heating and a system and method for designing such an integrated circuit chip |
Richard S. Graf, Keishi Okamoto, Faraydon Pakbaz, Sebastian T. Ventrone |
2014-06-17 |
$4,121,000 |
| 8612815 |
Asynchronous circuit with an at-speed built-in self-test (BIST) architecture |
Faraydon Pakbaz, Sebastian T. Ventrone |
2013-12-17 |
$6,242,000 |
| 8381050 |
Method and apparatus for increased effectiveness of delay and transition fault testing |
Pamela S. Gillis, Tad J. Wilder, Francis Woytowich, Tian Xia |
2013-02-19 |
$3,959,000 |
| 8300752 |
Method, circuit, and design structure for capturing data across a pseudo-synchronous interface |
Malede W. Berhanu, Christopher D. Hanudel, Mark W. Kuemerle, David W. Milton, Clarence R. Ogilvie |
2012-10-30 |
|
| 8188765 |
Circuit and method for asynchronous pipeline processing with variable request signal delay |
Michael R. Ouellette, Faraydon Pakbaz, Sebastian T. Ventrone |
2012-05-29 |
$10,419,000 |
| 8189723 |
Method, circuit, and design structure for capturing data across a pseudo-synchronous interface |
Malede W. Berhanu, Christopher D. Hanudel, Mark W. Kuemerle, David W. Milton, Clarence R. Ogilvie |
2012-05-29 |
$10,419,000 |
| 7750670 |
System and method for dynamically executing a function in a programmable logic array |
Kenneth J. Goodnow, Clarence R. Ogilvie, Christopher B. Reynolds, Sebastian T. Ventrone |
2010-07-06 |
$3,063,000 |
| 7529962 |
System for expanding a window of valid data |
Malede W. Berhanu, Christopher D. Hanudel, Mark W. Kuemerle, David W. Milton, Clarence R. Ogilvie |
2009-05-05 |
$6,523,000 |
| 7489163 |
FPGA powerup to known functional state |
Kenneth J. Goodnow, Clarence R. Ogilvie, Christopher B. Reynolds, Sebastian T. Ventrone, Keith R. Williams |
2009-02-10 |
$5,620,000 |
| 7417453 |
System and method for dynamically executing a function in a programmable logic array |
Kenneth J. Goodnow, Clarence R. Ogilvie, Christopher B. Reynolds, Sebastian T. Ventrone |
2008-08-26 |
$10,658,000 |
| 7406579 |
Selectively changeable line width memory |
Rafael Blanco, Sebastian T. Ventrone |
2008-07-29 |
$9,815,000 |
| 7304493 |
FPGA powerup to known functional state |
Kenneth J. Goodnow, Clarence R. Ogilvie, Christopher B. Reynolds, Sebastian T. Ventrone, Keith R. Williams |
2007-12-04 |
$7,765,000 |
| 7282949 |
FPGA powerup to known functional state |
Kenneth J. Goodnow, Clarence R. Ogilvie, Christopher B. Reynolds, Sebastian T. Ventrone, Keith R. Williams |
2007-10-16 |
$5,691,000 |
| 7206878 |
Voltage level bus protocol for transferring data |
Sebastian Ventrone |
2007-04-17 |
$6,339,000 |
| 7134104 |
Method of selectively building redundant logic structures to improve fault tolerance |
Kenneth J. Goodnow, Clarence R. Ogilvie, Sebastian T. Ventrone |
2006-11-07 |
$5,535,000 |
| 7080344 |
Coding of FPGA and standard cell logic in a tiling structure |
Stanislav P. Bajuk, Sebastian T. Ventrone |
2006-07-18 |
$4,124,000 |
| 7065733 |
Method for modifying the behavior of a state machine |
Kenneth J. Goodnow, Clarence R. Ogilvie, Christ pher B. Reynolds, Sebastian T. Ventrone |
2006-06-20 |
$5,983,000 |
| 7058914 |
Automatic latch compression/reduction |
Sebastian T. Ventrone |
2006-06-06 |
$5,053,000 |
| 6954085 |
System and method for dynamically executing a function in a programmable logic array |
Kenneth J. Goodnow, Clarence R. Ogilvie, Christopher B. Reynolds, Sebastian T. Ventrone |
2005-10-11 |
$11,788,000 |
| 6834353 |
Method and apparatus for reducing power consumption of a processing integrated circuit |
Sebastian T. Ventrone |
2004-12-21 |
$10,287,000 |
