Issued Patents All Time
Showing 1–10 of 10 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10651135 | Tamper detection for a chip package | Richard S. Graf, Ezra D. B. Hall, Sebastian T. Ventrone | 2020-05-12 |
| 8988140 | Real-time adaptive voltage control of logic blocks | Richard S. Graf, Joseph A. Iadanza, Jack R. Smith, Sebastian T. Ventrone, Ivan L. Wemple | 2015-03-24 |
| 8756549 | Integrated circuit chip incorporating embedded thermal radiators for localized, on-demand, heating and a system and method for designing such an integrated circuit chip | Richard S. Graf, Keishi Okamoto, Jack R. Smith, Sebastian T. Ventrone | 2014-06-17 |
| 8648634 | Input jitter filter for a phase-locked loop (PLL) | Ram Kelkar | 2014-02-11 |
| 8612815 | Asynchronous circuit with an at-speed built-in self-test (BIST) architecture | Jack R. Smith, Sebastian T. Ventrone | 2013-12-17 |
| 8188765 | Circuit and method for asynchronous pipeline processing with variable request signal delay | Michael R. Ouellette, Jack R. Smith, Sebastian T. Ventrone | 2012-05-29 |
| 7603639 | Method, apparatus and computer program product for controlling jitter or the effects of jitter in integrated circuitry | Stephen D. Wyatt | 2009-10-13 |
| 7533357 | Method and apparatus to target pre-determined spatially varying voltage variation across the area of the VLSI power distribution system using frequency domain analysis | Kurt A. Carlsen, Amol A. Joshi, Sanjay Upreti | 2009-05-12 |
| 7084615 | Performance measurement of device dedicated to phase locked loop using second order system approximation | Stephen D. Wyatt | 2006-08-01 |
| 6662352 | Method of assigning chip I/O's to package channels | Pascal A. Nsame | 2003-12-09 |