Issued Patents All Time
Showing 25 most recent of 26 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9496254 | Capacitor using middle of line (MOL) conductive layers | Bin Yang | 2016-11-15 |
| 9461040 | System and method of varying gate lengths of multiple cores | Ming Cai, Samit Sengupta, Chock Hing Gan | 2016-10-04 |
| 9412818 | System and method of manufacturing a fin field-effect transistor having multiple fin heights | Bin Yang, Xia Li, Choh Fei Yeap | 2016-08-09 |
| 9269492 | Bone frame, low resistance via coupled metal oxide-metal (MOM) orthogonal finger capacitor | John Jianhong Zhu, Lixin Ge, Bin Yang, Jihong Choi | 2016-02-23 |
| 9263522 | Transistor with a diffusion barrier | Bin Yang, Xia Li | 2016-02-16 |
| 9252104 | Complementary back end of line (BEOL) capacitor | John Jianhong Zhu, Bin Yang, Lixin Ge, Jihong Choi | 2016-02-02 |
| 9236483 | FinFET with backgate, without punchthrough, and with reduced fin height variation | Bin Yang, Xia Li, Choh Fei Yeap | 2016-01-12 |
| 9076775 | System and method of varying gate lengths of multiple cores | Ming Cai, Samit Sengupta, Chock Hing Gan | 2015-07-07 |
| 9024418 | Local interconnect structures for high density | John Jianhong Zhu, Giridhar Nallapati | 2015-05-05 |
| 9012966 | Capacitor using middle of line (MOL) conductive layers | Bin Yang | 2015-04-21 |
| 8610176 | Standard cell architecture using double poly patterning for multi VT devices | Prayag Bhanubhai Patel, Pratyush Kamal, Foua Vang, Chock Hing Gan, Chethan Swamynathan | 2013-12-17 |
| 7670892 | Nitrogen based implants for defect reduction in strained silicon | Srinivasan Chakravarthi, Rajesh Khamankar, Haowen Bu, Douglas T. Grider | 2010-03-02 |
| 7560324 | Drain extended MOS transistors and methods for making the same | — | 2009-07-14 |
| 7339215 | Transistor device containing carbon doped silicon in a recess next to MDD to create strain in channel | — | 2008-03-04 |
| 7244654 | Drive current improvement from recessed SiGe incorporation close to gate | Douglas T. Grider, Brian Smith, Haowen Bu, Lindsey Hall | 2007-07-17 |
| 7217626 | Transistor fabrication methods using dual sidewall spacers | Haowen Bu, Rajesh Khamankar, Lindsey Hall | 2007-05-15 |
| 7208362 | Transistor device containing carbon doped silicon in a recess next to MDD to create strain in channel | — | 2007-04-24 |
| 7122435 | Methods, systems and structures for forming improved transistors | Haowen Bu | 2006-10-17 |
| 7118977 | System and method for improved dopant profiles in CMOS transistors | Srinivasan Chakravarthi | 2006-10-10 |
| 7101751 | Versatile system for limiting electric field degradation of semiconductor structures | Greg Baldwin | 2006-09-05 |
| 7061058 | Forming a retrograde well in a transistor to enhance performance of the transistor | Srinivasan Chakravarthi, Robert C. Bowen, Haowen Bu | 2006-06-13 |
| 7060579 | Increased drive current by isotropic recess etch | Lindsey Hall, Haowen Bu | 2006-06-13 |
| 7012028 | Transistor fabrication methods using reduced width sidewall spacers | Haowen Bu, Rajesh Khamankar | 2006-03-14 |
| 6927137 | Forming a retrograde well in a transistor to enhance performance of the transistor | Srinivasan Chakravarthi, Robert C. Bowen, Haowen Bu | 2005-08-09 |
| 6818518 | Method for producing low/high voltage threshold transistors in semiconductor processing | — | 2004-11-16 |