Patent Leaderboard
USPTO Patent Rankings Data through Dec 31, 2025
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Samit Sengupta — 22 Patents

Qualcomm: 5 patents #3,310 of 12,104Top 30%
PAPhilips Electronics North America: 4 patents #88 of 725Top 15%
VTVlsi Technology: 4 patents #137 of 594Top 25%
Intel: 4 patents #8,538 of 30,777Top 30%
Philips: 3 patents #1,693 of 7,731Top 25%
PSPhilips Semiconductors: 2 patents #8 of 64Top 15%
San Diego, CA: #1,927 of 23,606 inventorsTop 9%
California: #25,951 of 386,348 inventorsTop 7%
Overall (All Time): #189,202 of 4,157,543Top 5%
22 Patents All Time
Samit Sengupta has been granted 22 US patents while listed as an inventor at Qualcomm. The first was granted in 1999 and the most recent in December 2020. Samit Sengupta ranks #189,202 of 4,157,543 US inventors in our database (top 4.6%). Patent records list Samit Sengupta in San Diego, CA, US.

Issued Patents All Time

Showing 1–22 of 22 patents

Patent #TitleCo-InventorsDateApprox Value ⓘ
10853542 Fuse-based logic repair Anil Chowdary Kota, Fadoua CHAFIK 2020-12-01
10490558 Reducing or avoiding mechanical stress in static random access memory (SRAM) strap cells Youn Sung Choi, Shashank S. Ekbote 2019-11-26 $19,575,000
9461040 System and method of varying gate lengths of multiple cores Ming Cai, Chock Hing Gan, PR Chidambaram 2016-10-04 $10,096,000
9245971 Semiconductor device having high mobility channel Bin Yang, P R Chidambaram, John Jianhong Zhu, Jihong Choi, Da Yang +4 more 2016-01-26 $6,427,000
9076775 System and method of varying gate lengths of multiple cores Ming Cai, Chock Hing Gan, PR Chidambaram 2015-07-07 $8,658,000
8217457 Electrostatic discharge (ESD) protection device for use with multiple I/O standards Cheng-Hsiung Huang, Wei Guang Wu 2012-07-10 $7,755,000
7468617 Electrostatic discharge (ESD) protection device for use with multiple I/O standards Cheng-Hsiung Huang, Wei Guang Wu 2008-12-23 $14,175,000
7286020 Techniques for monitoring and replacing circuits to maintain high performance Hugh Sungki O, Joseph Ingino 2007-10-23 $4,389,000
6933869 Integrated circuits with temperature-change and threshold-voltage drift compensation Greg Starr, Hugh Sungki O 2005-08-23 $19,520,000
6459153 Compositions for improving interconnect metallization performance in integrated circuits 2002-10-01 $1,294,000
6433433 Semiconductor device with misaligned via hole 2002-08-13 $1,355,000
6413152 Apparatus for performing chemical-mechanical planarization with improved process window, process flexibility and cost Charles Franklin Drill 2002-07-02
6410421 Semiconductor device with anti-reflective structure and methods of manufacture Kouros Ghandehari 2002-06-25 $1,249,000
6255226 Optimized metal etch process to enable the use of aluminum plugs Tammy Zheng, Calvin T. Gabriel 2001-07-03
6235609 Method for forming isolation areas with improved isolation oxide Faran Nouri 2001-05-22
6228757 Process for forming metal interconnects with reduced or eliminated metal recess in vias Tammy Zheng 2001-05-08
6207565 Integrated process for ashing resist and treating silicon after masked spacer etch Edward Yeh, Calvin T. Gabriel 2001-03-27
6176983 Methods of forming a semiconductor device Subhas Bothra, Dipankar Pramanik 2001-01-23
6162586 Method for substantially preventing footings in chemically amplified deep ultra violet photoresist layers Daniel C. Baker, Subhas Bothra 2000-12-19
6146996 Semiconductor device with conductive via and method of making same 2000-11-14
6057587 Semiconductor device with anti-reflective structure Kouros Ghandehari 2000-05-02
5915203 Method for producing deep submicron interconnect vias Subhas Bothra 1999-06-22 $4,359,000