| 11152347 |
Cell circuits formed in circuit cells employing offset gate cut areas in a non-active area for routing transistor gate cross-connections |
Stanley Seungchul Song, Kern Rim, John Jianhong Zhu |
2021-10-19 |
$19,681,000 |
| 10763364 |
Circuits having a diffusion break with avoided or reduced adjacent semiconductor channel strain relaxation, and related methods |
Stanley Seungchul Song, Kern Rim, Peijie Feng |
2020-09-01 |
$35,189,000 |
| 10700204 |
Circuits having a diffusion break with avoided or reduced adjacent semiconductor channel strain relaxation, and related methods |
Stanley Seungchul Song, Kern Rim, Peijie Feng |
2020-06-30 |
$14,245,000 |
| 10559501 |
Self-aligned quadruple patterning process for Fin pitch below 20nm |
Stanley Seungchul Song, Jeffrey Junhao Xu, Kern Rim, Choh Fei Yeap |
2020-02-11 |
$23,660,000 |
| 10497702 |
Metal-oxide semiconductor (MOS) standard cells employing electrically coupled source regions and supply rails to relax source-drain tip-to-tip spacing between adjacent MOS standard cells |
John Jianhong Zhu, Jeffrey Junhao Xu |
2019-12-03 |
$15,799,000 |
| 10181403 |
Layout effect mitigation in FinFET |
Yanxiang Liu, Jun Yuan, Kern Rim |
2019-01-15 |
$13,894,000 |
| 10090244 |
Standard cell circuits employing high aspect ratio voltage rails for reduced resistance |
Jeffrey Junhao Xu, Mustafa Badaroglu, Periannan Chidambaram |
2018-10-02 |
$9,965,000 |
| 10079293 |
Semiconductor device having a gap defined therein |
Jeffrey Junhao Xu, Kern Rim, John Jianhong Zhu, Stanley Seungchul Song, Mustafa Badaroglu +2 more |
2018-09-18 |
$19,606,000 |
| 10043796 |
Vertically stacked nanowire field effect transistors |
Vladimir Machkaoutsan, Stanley Seungchul Song, Mustafa Badaroglu, John Jianhong Zhu, Junjing Bao +3 more |
2018-08-07 |
$11,386,000 |
| 10032678 |
Nanowire channel structures of continuously stacked nanowires for complementary metal oxide semiconductor (CMOS) devices |
Jeffrey Junhao Xu, Stanley Seungchul Song, Vladimir Machkaoutsan, Mustafa Badaroglu, Choh Fei Yeap |
2018-07-24 |
$15,576,000 |
| 9997360 |
Method for mitigating layout effect in FINFET |
Yanxiang Liu, Jun Yuan, Kern Rim |
2018-06-12 |
$8,223,000 |
| 9985014 |
Minimum track standard cell circuits for reduced area |
Jeffrey Junhao Xu, Mustafa Badaroglu |
2018-05-29 |
$8,831,000 |
| 9953979 |
Contact wrap around structure |
Jeffrey Junhao Xu, Stanley Seungchul Song, Vladimir Machkaoutsan, Mustafa Badaroglu, Junjing Bao +2 more |
2018-04-24 |
$11,342,000 |
| 9871121 |
Semiconductor device having a gap defined therein |
Jeffrey Junhao Xu, Kern Rim, John Jianhong Zhu, Stanley Seungchul Song, Mustafa Badaroglu +2 more |
2018-01-16 |
$20,859,000 |
| 9859210 |
Integrated circuits having reduced dimensions between components |
Stanley Seungchul Song, Choh Fei Yeap |
2018-01-02 |
$10,891,000 |
| 9799560 |
Self-aligned structure |
Stanley Seungchul Song, Jeffrey Junhao Xu, Kern Rim, John Jianhong Zhu, Junjing Bao +4 more |
2017-10-24 |
$7,716,000 |
| 9653399 |
Middle-of-line integration methods and semiconductor devices |
John Jianhong Zhu, Jeffrey Junhao Xu, Stanley Seungchul Song, Kern Rim |
2017-05-16 |
$7,321,000 |
| 9620454 |
Middle-of-line (MOL) manufactured integrated circuits (ICs) employing local interconnects of metal lines using an elongated via, and related methods |
John Jianhong Zhu, Kern Rim, Stanley Seungchul Song, Jeffrey Junhao Xu |
2017-04-11 |
$7,135,000 |
| 9502283 |
Electron-beam (E-beam) based semiconductor device features |
Stanley Seungchul Song, Jeffrey Junhao Xu, Choh Fei Yeap |
2016-11-22 |
$8,308,000 |
| 9397007 |
Method for manufacturing semiconductor structure through forming an additional layer inside opening of a photoresist layer |
Huicai Zhong, Qingqing Liang, Chao Zhao |
2016-07-19 |
|
| 9263279 |
Combining cut mask lithography and conventional lithography to achieve sub-threshold pattern features |
John Jianhong Zhu, Zhongze Wang |
2016-02-16 |
$6,980,000 |
| 9245971 |
Semiconductor device having high mobility channel |
Bin Yang, P R Chidambaram, John Jianhong Zhu, Jihong Choi, Ravi M. Todi +4 more |
2016-01-26 |
$6,427,000 |
| 8669160 |
Method for manufacturing a semiconductor device |
Haizhou Yin, Zhijiong Luo, Huilong Zhu |
2014-03-11 |
|
| 8420492 |
MOS transistor and method for forming the same |
Huicai Zhong, Qingqing Liang, Chao Zhao |
2013-04-16 |
|
| 7989804 |
Test pattern structure |
Chih-Ping Lee, Rui Cheng, Xing Zhang, Xu Jason Ma, Xiao Han +3 more |
2011-08-02 |
$3,729,000 |
