Issued Patents All Time
Showing 1–25 of 25 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 11295829 | Built-in self-test (BIST) engine configured to store a per pattern based fail status in a pattern mask register | Aravindan J. Busi, John R. Goss, Paul J. Grzymkowski, Krishnendu Mondal, Kiran K. Narayan +1 more | 2022-04-05 |
| 11288120 | Circuit and method for soft-error protection in operation of ECC and register | — | 2022-03-29 |
| 10971243 | Built-in self-test (BIST) engine configured to store a per pattern based fail status in a pattern mask register | Aravindan J. Busi, John R. Goss, Paul J. Grzymkowski, Krishnendu Mondal, Kiran K. Narayan +1 more | 2021-04-06 |
| 10950325 | Memory built-in self test error correcting code (MBIST ECC) for low voltage memories | Deepak I. Hanagandi, Igor Arsovski, Valerie H. Chickanosky, Kalpesh R. Lodha | 2021-03-16 |
| 10839931 | Zero test time memory using background built-in self-test | Igor Arsovski, Eric D. Hunt-Schroeder | 2020-11-17 |
| 10692584 | Built-in self-test (BIST) engine configured to store a per pattern based fail status in a pattern mask register | Aravindan J. Busi, John R. Goss, Paul J. Grzymkowski, Krishnendu Mondal, Kiran K. Narayan +1 more | 2020-06-23 |
| 10553302 | Built-in self-test (BIST) engine configured to store a per pattern based fail status in a pattern mask register | Aravindan J. Busi, John R. Goss, Paul J. Grzymkowski, Krishnendu Mondal, Kiran K. Narayan +1 more | 2020-02-04 |
| 10490296 | Memory built-in self-test (MBIST) test time reduction | Michael R. Ouellette, Deepak I. Hanagandi, Aravindan J. Busi, Kiran K. Narayan | 2019-11-26 |
| 10438678 | Zero test time memory using background built-in self-test | Igor Arsovski, Eric D. Hunt-Schroeder | 2019-10-08 |
| 9881694 | Built-in-self-test (BIST) engine configured to store a per pattern based fail status in a pattern mask register | Aravindan J. Busi, John R. Goss, Paul J. Grzymkowski, Krishnendu Mondal, Kiran K. Narayan +1 more | 2018-01-30 |
| 9859019 | Programmable counter to control memory built in self-test | Deepak I. Hanagandi, Krishnendu Mondal, Kiran K. Narayan, Michael R. Ouellette | 2018-01-02 |
| 9286181 | Apparatus for capturing results of memory testing | Craig M. Monroe, Michael R. Ouellette, Douglas E. Sprague | 2016-03-15 |
| 8935586 | Staggered start of BIST controllers and BIST engines | Valarie H. Chickanosky, Kevin W. Gorman, Suzanne Granato, Michael R. Ouellette, Nancy H. Pratt | 2015-01-13 |
| 8918690 | Decreasing power supply demand during BIST initializations | Deepak I. Hanagandi, Krishnendu Mondal, Michael R. Ouellette | 2014-12-23 |
| 8719648 | Interleaving of memory repair data compression and fuse programming operations in single fusebay architecture | Kevin W. Gorman, Michael R. Ouellette | 2014-05-06 |
| 8595678 | Validating interconnections between logic blocks in a circuit description | Craig M. Monroe, Michael R. Ouellette, Douglas E. Sprague | 2013-11-26 |
| 8570820 | Selectable repair pass masking | Kevin W. Gorman, John R. Goss, Michael R. Ouellette, Troy J. Perry | 2013-10-29 |
| 8537627 | Determining fusebay storage element usage | Michael R. Ouellette | 2013-09-17 |
| 8484543 | Fusebay controller structure, system, and method | Darren L. Anand, Kevin W. Gorman, Michael R. Ouellette | 2013-07-09 |
| 8467260 | Structure and method for storing multiple repair pass data into a fusebay | Kevin W. Gorman, Michael R. Ouellette | 2013-06-18 |
| 8214699 | Circuit structure and method for digital integrated circuit performance screening | Igor Arsovski, David J. Wager | 2012-07-03 |
| 7895028 | Structure for increasing fuse programming yield | Darren L. Anand, Michael R. Ouellette | 2011-02-22 |
| 7826288 | Device threshold calibration through state dependent burn-in | Igor Arsovski, Harold Pilo | 2010-11-02 |
| 7757141 | Automatically extensible addressing for shared array built-in self-test (ABIST) circuitry | Valerie H. Chickanosky, Kevin W. Gorman, Michael R. Ouellette | 2010-07-13 |
| 7251756 | Method and apparatus for increasing fuse programming yield through preferred use of duplicate data | Darren L. Anand, Michael R. Ouellette | 2007-07-31 |