Issued Patents All Time
Showing 1–24 of 24 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 7776653 | Controlling flip-chip techniques for concurrent ball bonds in semiconductor devices | David N. Walter, Mark A. Gerber | 2010-08-17 |
| 7573137 | Controlling flip-chip techniques for concurrent ball bonds in semiconductor devices | David N. Walter, Mark A. Gerber | 2009-08-11 |
| 7095671 | Electrical fuse control of memory slowdown | Manjeri Krishnan, Bryan Sheffield, Joel J. Graber, Sanjive Agarwala | 2006-08-22 |
| 6928011 | Electrical fuse control of memory slowdown | Manjeri Krishnan, Bryan Sheffield, Joel J. Graber, Sanjive Agarwala | 2005-08-09 |
| 6242936 | Circuit for driving conductive line and testing conductive line for current leakage | Michael Duc Ho, Scott E. Smith | 2001-06-05 |
| 6201752 | Timing circuit for high voltage testing | Anh Viet Bui, Scott E. Smith | 2001-03-13 |
| 6088280 | High-speed memory arranged for operating synchronously with a microprocessor | Wilbur C. Vogley, Anthony M. Balistreri, Karl M. Guttag, Steven D. Krueger, Joseph H. Neal +3 more | 2000-07-11 |
| 6038177 | Data pipeline interrupt scheme for preventing data disturbances | M. Kumar Rajith, Kallol Mazumder, Scott E. Smith | 2000-03-14 |
| 5982694 | High speed memory arranged for operating synchronously with a microprocessor | Wilbur C. Vogley, Anthony M. Balistreri, Karl M. Guttag, Steven D. Krueger, Joseph H. Neal +3 more | 1999-11-09 |
| 5912854 | Data processing system arranged for operating synchronously with a high speed memory | Wilbur C. Vogley, Anthony M. Balistreri, Karl M. Guttag, Steven D. Krueger, Joseph H. Neal +3 more | 1999-06-15 |
| 5867421 | Integrated circuit memory device having reduced stress across large on-chip capacitor | Michael Duc Ho, Scott E. Smith | 1999-02-02 |
| 5808958 | Random access memory with latency arranged for operating synchronously with a micro processor and a system including a data processor, a synchronous DRAM, a peripheral device, and a system clock | Wilbur C. Vogley, Anthony M. Balistreri, Karl M. Guttag, Steven D. Krueger, Joseph H. Neal +3 more | 1998-09-15 |
| 5706234 | Testing and repair of wide I/O semiconductor memory devices designed for testing | Charles J. Pilch, Jr., Carl Perrin, Scott E. Smith, Yutaka Komai | 1998-01-06 |
| 5637828 | High density semiconductor package | Ernest J. Russell, Daniel Baudouin, James Wallace | 1997-06-10 |
| 5587954 | Random access memory arranged for operating synchronously with a microprocessor and a system including a data processor, a synchronous DRAM, a peripheral device, and a system clock | Wilbur C. Vogley, Anthony M. Balistreri, Karl M. Guttag, Steven D. Krueger, Joseph H. Neal +3 more | 1996-12-24 |
| 5511025 | Write per bit with write mask information carried on the data path past the input data latch | Scott E. Smith, Michael Duc Ho | 1996-04-23 |
| 5483024 | High density semiconductor package | Ernest J. Russell, Daniel Baudouin, James Wallace | 1996-01-09 |
| 5469385 | Output buffer with boost from voltage supplies | Scott E. Smith, Michael C. Stephens, Jr., Masayoshi Nomura | 1995-11-21 |
| 5410510 | Process of making and a DRAM standby charge pump with oscillator having fuse selectable frequencies | Scott E. Smith, Kenneth A. Poteet, Michael V. Ho | 1995-04-25 |
| 5402390 | Fuse selectable timing signals for internal signal generators | Duc Ho, Kenneth A. Poteet, Scott E. Smith | 1995-03-28 |
| 5390149 | System including a data processor, a synchronous dram, a peripheral device, and a system clock | Wilbur C. Vogley, Anthony M. Balistreri, Karl M. Guttag, Steven D. Krueger, Joseph H. Neal +3 more | 1995-02-14 |
| 5347184 | Dual receiver edge-triggered digital signal level detection system | Michael C. Stephens, Jr., Roger D. Norwood, Kenneth A. Poteet | 1994-09-13 |
| 5295101 | Array block level redundancy with steering logic | Michael C. Stephens, Jr., Scott E. Smith, Charles J. Pilch, Jr., Terry T. Tsai, Arthur R. Piejko | 1994-03-15 |
| 5075572 | Detector and integrated circuit device including charge pump circuits for high load conditions | Kenneth A. Poteet | 1991-12-24 |