Issued Patents All Time
Showing 1–13 of 13 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6088280 | High-speed memory arranged for operating synchronously with a microprocessor | Wilbur C. Vogley, Anthony M. Balistreri, Karl M. Guttag, Steven D. Krueger, Duy-Loan T. Le +3 more | 2000-07-11 |
| 5982694 | High speed memory arranged for operating synchronously with a microprocessor | Wilbur C. Vogley, Anthony M. Balistreri, Karl M. Guttag, Steven D. Krueger, Duy-Loan T. Le +3 more | 1999-11-09 |
| 5912854 | Data processing system arranged for operating synchronously with a high speed memory | Wilbur C. Vogley, Anthony M. Balistreri, Karl M. Guttag, Steven D. Krueger, Duy-Loan T. Le +3 more | 1999-06-15 |
| 5808958 | Random access memory with latency arranged for operating synchronously with a micro processor and a system including a data processor, a synchronous DRAM, a peripheral device, and a system clock | Wilbur C. Vogley, Anthony M. Balistreri, Karl M. Guttag, Steven D. Krueger, Duy-Loan T. Le +3 more | 1998-09-15 |
| 5745088 | Time multiplexed addressing circuitry | Kevin Kornher, James L. Conner, Claude E. Tew, Hiep V. Tran, Ngai H. Hong | 1998-04-28 |
| 5587954 | Random access memory arranged for operating synchronously with a microprocessor and a system including a data processor, a synchronous DRAM, a peripheral device, and a system clock | Wilbur C. Vogley, Anthony M. Balistreri, Karl M. Guttag, Steven D. Krueger, Duy-Loan T. Le +3 more | 1996-12-24 |
| 5390149 | System including a data processor, a synchronous dram, a peripheral device, and a system clock | Wilbur C. Vogley, Anthony M. Balistreri, Karl M. Guttag, Steven D. Krueger, Duy-Loan T. Le +3 more | 1995-02-14 |
| 5228132 | Memory module arranged for data and parity bits | Kenneth A. Poteet | 1993-07-13 |
| 5089993 | Memory module arranged for data and parity bits | Kenneth A. Poteet | 1992-02-18 |
| 4868823 | High speed concurrent testing of dynamic read/write memory array | Lionel S. White, Jr., Bao G. Tran | 1989-09-19 |
| 4654849 | High speed concurrent testing of dynamic read/write memory array | Lionel S. White, Jr., Bao G. Tran | 1987-03-31 |
| 4618947 | Dynamic memory with improved address counter for serial modes | Bao G. Tran, Lionel S. White, Jr. | 1986-10-21 |
| 4281397 | Virtual ground MOS EPROM or ROM matrix | Paul A. Reed | 1981-07-28 |