Issued Patents All Time
Showing 1–25 of 27 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 5835336 | Complemetary reset scheme for micromechanical devices | Richard L. Knipe, Duane E. Carter | 1998-11-10 |
| 5251168 | Boundary cells for improving retention time in memory devices | Gishi Chung, William R. McKee, William F. Richardson | 1993-10-05 |
| 4868823 | High speed concurrent testing of dynamic read/write memory array | Joseph H. Neal, Bao G. Tran | 1989-09-19 |
| 4748349 | High performance dynamic sense amplifier with voltage boost for row address lines | Joseph C. McAlexander, G. R. Mohan Rao | 1988-05-31 |
| 4654849 | High speed concurrent testing of dynamic read/write memory array | Joseph H. Neal, Bao G. Tran | 1987-03-31 |
| 4642784 | Integrated circuit manufacture | Maury Zivitz | 1987-02-10 |
| 4618947 | Dynamic memory with improved address counter for serial modes | Bao G. Tran, Joseph H. Neal | 1986-10-21 |
| 4543500 | High performance dynamic sense amplifier voltage boost for row address lines | Joseph C. McAlexander, G. R. Mohan Rao | 1985-09-24 |
| 4543501 | High performance dynamic sense amplifier with dual channel grounding transistor | Joseph C. McAlexander, G. R. Mohan Rao | 1985-09-24 |
| 4533843 | High performance dynamic sense amplifier with voltage boost for row address lines | Joseph C. McAlexander, G. R. Mohan Rao | 1985-08-06 |
| 4494222 | Processor system using on-chip refresh address generator for dynamic memory | G. R. Mohan Rao | 1985-01-15 |
| 4418293 | High performance dynamic sense amplifier with multiple column outputs | Joseph C. McAlexander, G. R. Mohan Rao | 1983-11-29 |
| 4401904 | Delay circuit used in semiconductor memory device | Ngai H. Hong | 1983-08-30 |
| 4370575 | High performance dynamic sense amplifier with active loads | Joseph C. McAlexander, G. R. Mohan Rao | 1983-01-25 |
| 4352996 | IGFET Clock generator circuit employing MOS boatstrap capacitive drive | — | 1982-10-05 |
| 4344157 | On-chip refresh address generator for dynamic memory | G. R. Mohan Rao | 1982-08-10 |
| 4330851 | Dynamic decoder input for semiconductor memory | — | 1982-05-18 |
| 4330852 | Semiconductor read/write memory array having serial access | Donald J. Redwine, G. R. Mohan Rao | 1982-05-18 |
| 4321695 | High speed serial access semiconductor memory with fault tolerant feature | Donald J. Redwine | 1982-03-23 |
| 4288706 | Noise immunity in input buffer circuit for semiconductor memory | Edmund A. Reese, Joseph C. McAlexander | 1981-09-08 |
| 4286178 | Sense amplifier with dual parallel driver transistors in MOS random access memory | G. R. Mohan Rao | 1981-08-25 |
| 4281401 | Semiconductor read/write memory array having high speed serial shift register access | Donald J. Redwine, G. R. Mohan Rao | 1981-07-28 |
| 4280070 | Balanced input buffer circuit for semiconductor memory | Edmund A. Reese, Joseph C. McAlexander | 1981-07-21 |
| 4255679 | Depletion load dynamic sense amplifier for MOS random access memory | James C. Blankenhorn | 1981-03-10 |
| 4247919 | Low power quasi-static storage cell | Ngai H. Hong | 1981-01-27 |