Issued Patents All Time
Showing 1–25 of 28 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 7968789 | Method and apparatus for eye-safe transmittal of electrical power in vehicles using white light via plastic optical fiber | Paul Douglas Stoner | 2011-06-28 |
| 7925166 | Method and apparatus for phostonic stack system for vehicle control/sense | Paul Douglas Stoner | 2011-04-12 |
| 7603040 | Chip to chip optic alleys and method | — | 2009-10-13 |
| 6842551 | Backplane wire and noise eliminator tube | — | 2005-01-11 |
| 6832014 | Backplane wire and noise eliminator tube | — | 2004-12-14 |
| 6617872 | Reduced cost, high speed integrated circuit test arrangement | — | 2003-09-09 |
| 6583639 | Reduced cost, high speed circuit test arrangement | — | 2003-06-24 |
| 6549695 | Method and apparatus for optically switching data | — | 2003-04-15 |
| 6285625 | High-speed clock circuit for semiconductor memory device | — | 2001-09-04 |
| 6260106 | Synchronous data storage system having re-drive circuits for reduced signal line loading | — | 2001-07-10 |
| 6230250 | Synchronous memory and data processing system having a programmable burst order | — | 2001-05-08 |
| 6223264 | Synchronous dynamic random access memory and data processing system using an address select signal | — | 2001-04-24 |
| 6219746 | Data processing system having a synchronous memory with an output circuit which selectively outputs groups of M data bits | — | 2001-04-17 |
| 6212596 | Synchronous memory and data processing system having a programmable burst length | — | 2001-04-03 |
| 6114870 | Test system and process with a microcomputer at each test location | — | 2000-09-05 |
| 6088280 | High-speed memory arranged for operating synchronously with a microprocessor | Anthony M. Balistreri, Karl M. Guttag, Steven D. Krueger, Duy-Loan T. Le, Joseph H. Neal +3 more | 2000-07-11 |
| 6064254 | High speed integrated circuit interconnection having proximally located active converter | Jonathan H. Shiell | 2000-05-16 |
| 6028781 | Selectable integrated circuit assembly and method of operation | Robert L. Ward | 2000-02-22 |
| 5982694 | High speed memory arranged for operating synchronously with a microprocessor | Anthony M. Balistreri, Karl M. Guttag, Steven D. Krueger, Duy-Loan T. Le, Joseph H. Neal +3 more | 1999-11-09 |
| 5912854 | Data processing system arranged for operating synchronously with a high speed memory | Anthony M. Balistreri, Karl M. Guttag, Steven D. Krueger, Duy-Loan T. Le, Joseph H. Neal +3 more | 1999-06-15 |
| 5907247 | Test system and process with microcomputers and serial interface | — | 1999-05-25 |
| 5808958 | Random access memory with latency arranged for operating synchronously with a micro processor and a system including a data processor, a synchronous DRAM, a peripheral device, and a system clock | Anthony M. Balistreri, Karl M. Guttag, Steven D. Krueger, Duy-Loan T. Le, Joseph H. Neal +3 more | 1998-09-15 |
| 5615358 | Time skewing arrangement for operating memory in synchronism with a data processor | — | 1997-03-25 |
| 5608896 | Time skewing arrangement for operating memory devices in synchronism with a data processor | — | 1997-03-04 |
| 5587954 | Random access memory arranged for operating synchronously with a microprocessor and a system including a data processor, a synchronous DRAM, a peripheral device, and a system clock | Anthony M. Balistreri, Karl M. Guttag, Steven D. Krueger, Duy-Loan T. Le, Joseph H. Neal +3 more | 1996-12-24 |