Thomas A. Letson — 14 Patents at Intel

Thomas A. Letson has been granted 14 US patents while listed as an inventor at Intel. The first was granted in 1995 and the most recent in March 2019. Thomas A. Letson ranks #332,869 of 4,157,543 US inventors in our database (top 8.0%). Patent records list Thomas A. Letson in Beaverton, OR, US.

Issued Patents All Time

Showing 1–14 of 14 patents

Patent #	Title	Co-Inventors	Date	Approx Value ⓘ
10236356	Nonplanar device with thinned lower body portion and method of fabrication	Uday Shah, Brian S. Doyle, Justin K. Brask, Robert S. Chau	2019-03-19	$29,538,000
9741809	Nonplanar device with thinned lower body portion and method of fabrication	Uday Shah, Brian S. Doyle, Justin K. Brask, Robert S. Chau	2017-08-22	$8,061,000
9190518	Nonplanar device with thinned lower body portion and method of fabrication	Uday Shah, Brian S. Doyle, Justin K. Brask, Robert S. Chau	2015-11-17	$15,457,000
8749026	Nonplanar device with thinned lower body portion and method of fabrication	Uday Shah, Brian S. Doyle, Justin K. Brask, Robert S. Chau	2014-06-10	$19,303,000
8502351	Nonplanar device with thinned lower body portion and method of fabrication	Uday Shah, Brian S. Doyle, Justin K. Brask, Robert S. Chau	2013-08-06	$18,826,000
8067818	Nonplanar device with thinned lower body portion and method of fabrication	Uday Shah, Brian S. Doyle, Justin K. Brask, Robert S. Chau	2011-11-29	$19,402,000
7821044	Transistor with improved tip profile and method of manufacture thereof	Mark Bohr, Steven J. Keating, Anand S. Murthy, Donald W. O'Neill, Willy Rachmady	2010-10-26	$15,337,000
7550333	Nonplanar device with thinned lower body portion and method of fabrication	Uday Shah, Brian S. Doyle, Justin K. Brask, Robert S. Chau	2009-06-23	$19,334,000
7494858	Transistor with improved tip profile and method of manufacture thereof	Mark Bohr, Steven J. Keating, Anand S. Murthy, Donald W. O'Neill, Willy Rachmady	2009-02-24	$15,365,000
7208399	Transistor with notched gate	Charles Chu	2007-04-24	$13,574,000
6191016	Method of patterning a layer for a gate electrode of a MOS transistor	Robert S. Chau, Patricia Stokley, Peter K. Charvat, Ralph A. Schweinfurth	2001-02-20	$103,043,000
5874358	Via hole profile and method of fabrication	Alan M. Myers, Peter K. Charvat, Shi-ning Yang, Peng Bai	1999-02-23	$224,973,000
5619071	Anchored via connection	Alan M. Myers, Peter K. Charvat, Shi-ning Yang, Peng Bai	1997-04-08	$59,679,000
5470790	Via hole profile and method of fabrication	Alan M. Myers, Peter K. Charvat, Shi-ning Yang, Peng Bai	1995-11-28	$29,998,000

Thomas A. Letson — 14 Patents

Issued Patents All Time

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