Patents per Year
Issued Patents All Time
Showing 1–3 of 3 patents
| Patent # | Title | Co-Inventors | Date | Approx Value ⓘ |
|---|---|---|---|---|
| 6191016 | Method of patterning a layer for a gate electrode of a MOS transistor | Robert S. Chau, Thomas A. Letson, Patricia Stokley, Peter K. Charvat | 2001-02-20 | $103,043,000 |
| 5933759 | Method of controlling etch bias with a fixed lithography pattern for sub-micron critical dimension shallow trench applications | Phi L. Nguyen, Swaminathan Sivakumar | 1999-08-03 | $168,638,000 |
| 5843846 | Etch process to produce rounded top corners for sub-micron silicon trench applications | Phi L. Nguyen | 1998-12-01 | $77,437,000 |