Issued Patents All Time
Showing 26–50 of 58 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9652236 | Instruction and logic for non-blocking register reclamation | Srikanth Srinivasan, Mark Dechene, Yury N. Ilin, Justin M. Deinlein, Christine E. Wang | 2017-05-16 |
| 9612938 | Providing status of a processing device with periodic synchronization point in instruction tracing system | Frank Binns, Mayank Bomb, Beeman C. Strong, Peter Lachner, Jason W. Brandt +3 more | 2017-04-04 |
| 9606602 | Method and apparatus to prevent voltage droop in a computer | Anupama Suryanarayanan, Ryan Carlson | 2017-03-28 |
| 9582275 | Method and apparatus for obtaining a call stack to an event of interest and analyzing the same | Michael W. Chynoweth, Peggy J. Irelan, Seung-Woo Kim, Laura A. Knauth, Stanislav Bratanov | 2017-02-28 |
| 9542191 | Hardware profiling mechanism to enable page level automatic binary translation | Paul Caprioli, Muawya M. Al-Otoom, Omar M. Shaikh, Abhay S. Kanhere, Suresh Srinivas +3 more | 2017-01-10 |
| 9535744 | Method and apparatus for continued retirement during commit of a speculative region of code | Ravi Rajwar, Christine E. Wang, Vijaykumar B. Kadgi, Rajesh S. Parthasarathy | 2017-01-03 |
| 9524191 | Apparatus including a stall counter to bias processing element selection, and masks to allocate reservation unit entries to one or more processing elements | Morris Marden, Alexandre J. Farcy, Avinash Sodani, James Hadley, Ilhyun Kim | 2016-12-20 |
| 9495159 | Two level re-order buffer | Mark Dechene, Srikanth Srinivasan, Tong Li, Christine E. Wang | 2016-11-15 |
| 9465680 | Method and apparatus for processor performance monitoring | Michael W. Chynoweth, Jonathan D. Combs, Angela D. Schmid, Kimberly C. Weier, Ahmad Yasin +3 more | 2016-10-11 |
| 9442729 | Minimizing bandwidth to track return targets by an instruction tracing system | Beeman C. Strong, Tong Li | 2016-09-13 |
| 9372698 | Method and apparatus for implementing dynamic portbinding within a reservation station | Bambang Sutanto, Srikanth Srinivasan, Chia Yin Kevin Lai, Ammon Christiansen, Justin M. Deinlein | 2016-06-21 |
| 9354875 | Enhanced loop streaming detector to drive logic optimization | Justin M. Deinlein, Yury N. Ilin, Alexandre J. Farcy, Tong Li, Srikanth Srinivasan | 2016-05-31 |
| 9292288 | Systems and methods for flag tracking in move elimination operations | Vijaykumar B. Kadgi, Jeremy R. Anderson, James Hadley, Tong Li | 2016-03-22 |
| 9268596 | Instruction and logic to test transactional execution status | Ravi Rajwar, Bret L. Toll, Konrad K. Lai, Martin G. Dixon | 2016-02-23 |
| 9182986 | Copy-on-write buffer for restoring program code from a speculative region to a non-speculative region | Ravi Rajwar, David Sung-Eun Lim, James Hadley, Joseph A. McMahon, Yury N. Ilin +1 more | 2015-11-10 |
| 9134788 | Method, apparatus, and system for energy efficiency and energy conservation including detecting and controlling current ramps in processing circuit | Anupama Suryanarayanan, Ryan Carlson, Stephen H. Gunther | 2015-09-15 |
| 9092214 | SIMD processor with programmable counters externally configured to count executed instructions having operands of particular register size and element size combination | Laura A. Knauth, Ronak Singhal, Hugh M. Caffey | 2015-07-28 |
| 8812792 | Technique for using memory attributes | Quinn A. Jacobson, Anne W. Bracy, Hong Wang, John Shen, Per Hammarlund +6 more | 2014-08-19 |
| 8607241 | Compare and exchange operation using sleep-wakeup mechanism | Bratin Saha, Per Hammarlund | 2013-12-10 |
| 8560781 | Technique for using memory attributes | Quinn A. Jacobson, Anne W. Bracy, Hong Wang, John Shen, Per Hammarlund +6 more | 2013-10-15 |
| 8521993 | Providing thread fairness by biasing selection away from a stalling thread using a stall-cycle counter in a hyper-threaded microprocessor | Morris Marden, Alexandre J. Farcy, Avinash Sodani, James Hadley, Ilhyun Kim | 2013-08-27 |
| 8504804 | Managing multiple threads in a single pipeline | Avinash Sodani, James Hadley, Alexandre J. Farcy, Iredamola Olopade | 2013-08-06 |
| 8438369 | Providing thread fairness by biasing selection away from a stalling thread using a stall-cycle counter in a hyper-threaded microprocessor | Morris Marden, Alexandre J. Farcy, Avinash Sodani, James Hadley, Ilhyun Kim | 2013-05-07 |
| 8402253 | Managing multiple threads in a single pipeline | Avinash Sodani, James Hadley, Alexandre J. Farcy, Iredamola Olopade | 2013-03-19 |
| 8291196 | Forward-pass dead instruction identification and removal at run-time | Stephan Jourdan, Alexandre J. Farcy | 2012-10-16 |