MS

Massimo Sutera

IN Intel: 5 patents #7,174 of 30,777Top 25%
AC Ampere Computing: 4 patents #13 of 94Top 15%
Oracle: 3 patents #4,017 of 14,854Top 30%
Overall (All Time): #392,715 of 4,157,543Top 10%
12
Patents All Time

Issued Patents All Time

Patent #TitleCo-InventorsDate
12314130 Parity protected memory blocks merged with error correction code (ECC) protected blocks in a codeword for increased memory utilization Nagi Aboulenein, Sandeep Brahmadathan 2025-05-27
12204410 Integrated error correction code (ECC) and parity protection in memory control circuits for increased memory utilization Nagi Aboulenein, Sandeep Brahmadathan 2025-01-21
12159056 Extending functionality of memory controllers in a processor-based device Sandeep Brahmadathan, Nagi Aboulenein, Brian Thomas Chase, James Edward Casteel, Kha Minh Huynh +1 more 2024-12-03
11934263 Parity protected memory blocks merged with error correction code (ECC) protected blocks in a codeword for increased memory utilization Nagi Aboulenein, Sandeep Brahmadathan 2024-03-19
10162750 System address reconstruction 2018-12-25
10042562 Apparatus and method for a non-power-of-2 size cache in a first level memory device to cache data present in a second level memory device Vedaraman Geetha, Henk G. Neefs, Brian S. Morris, Sreenivas Mandava 2018-08-07
10007606 Implementation of reserved cache slots in computing system having inclusive/non inclusive tracking and two level system memory Vedaraman Geetha, Brian S. Morris, Binata Bhattacharyya 2018-06-26
9747041 Apparatus and method for a non-power-of-2 size cache in a first level memory device to cache data present in a second level memory device Vedaraman Geetha, Henk G. Neefs, Brian S. Morris, Sreenivas Mandava 2017-08-29
9734054 Efficient implementation of geometric series 2017-08-15
7721011 Method and apparatus for reordering memory accesses to reduce power consumption in computer systems 2010-05-18
6900674 Method and circuitry for phase align detection in multi-clock domain Fabrizio Romano, David A. Bunsey, Jr., Daniel Cheung, Lan Lee, Kevin Normoyle +2 more 2005-05-31
6832180 Method for reducing noise in integrated circuit layouts Alan Smith 2004-12-14