Issued Patents All Time
Showing 201–225 of 378 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10243069 | Gallium nitride transistor having a source/drain structure including a single-crystal portion abutting a 2D electron gas | Han Wui Then, Sansaptak Dasgupta, Seung Hoon Sung, Sanaz K. Gardner, Robert S. Chau | 2019-03-26 |
| 10236369 | Techniques for forming non-planar germanium quantum well devices | Ravi Pillarisetty, Jack T. Kavalieros, Willy Rachmady, Uday Shah, Benjamin Chu-Kung +4 more | 2019-03-19 |
| 10229991 | III-N epitaxial device structures on free standing silicon mesas | Sansaptak Dasgupta, Han Wui Then, Sanaz K. Gardner, Seung Hoon Sung, Benjamin Chu-Kung +1 more | 2019-03-12 |
| 10217673 | Integrated circuit die having reduced defect group III-nitride structures and methods associated therewith | Sansaptak Dasgupta, Han Wui Then, Sanaz K. Gardner, Seung Hoon Sung, Robert S. Chau +1 more | 2019-02-26 |
| 10211327 | Semiconductor devices with raised doped crystalline structures | Sansaptak Dasgupta, Sanaz K. Gardner, Seung Hoon Sung, Han Wui Then, Robert S. Chau | 2019-02-19 |
| 10204989 | Method of fabricating semiconductor structures on dissimilar substrates | Benjamin Chu-Kung, Sherry R. Taft, Van H. Le, Sansaptak Dasgupta, Seung Hoon Sung +3 more | 2019-02-12 |
| 10186581 | Group III-N nanowire transistors | Han Wui Then, Robert S. Chau, Benjamin Chu-Kung, Gilbert Dewey, Jack T. Kavalieros +3 more | 2019-01-22 |
| 10181518 | Selective epitaxially grown III-V materials based devices | Niti Goel, Gilbert Dewey, Niloy Mukherjee, Matthew V. Metz, Benjamin Chu-Kung +2 more | 2019-01-15 |
| 10177249 | Techniques for forming contacts to quantum well transistors | Ravi Pillarisetty, Benjamin Chu-Kung, Mantu K. Hudait, Jack T. Kavalieros, Willy Rachmady +2 more | 2019-01-08 |
| 10170612 | Epitaxial buffer layers for group III-N transistors on silicon substrates | Sansaptak Dasgupta, Han Wui Then, Niloy Mukherjee, Robert S. Chau | 2019-01-01 |
| 10096683 | Group III-N transistor on nanoscale template structures | Han Wui Then, Sansaptak Dasgupta, Benjamin Chu-Kung, Sanaz K. Gardner, Seung Hoon Sung +1 more | 2018-10-09 |
| 10096682 | III-N devices in Si trenches | Sansaptak Dasgupta, Han Wui Then, Sanaz K. Gardner, Seung Hoon Sung, Benjamin Chu-Kung +3 more | 2018-10-09 |
| 10096709 | Aspect ratio trapping (ART) for fabricating vertical semiconductor devices | Van H. Le, Benjamin Chu-Kung, Gilbert Dewey, Jack T. Kavalieros, Ravi Pillarisetty +4 more | 2018-10-09 |
| 10090405 | Semiconductor device having group III-V material active region and graded gate dielectric | Gilbert Dewey, Ravi Pillarisetty, Matthew V. Metz | 2018-10-02 |
| 10084043 | High mobility nanowire fin channel on silicon substrate formed using sacrificial sub-fin | Gilbert Dewey, Matthew V. Metz, Jack T. Kavalieros, Willy Rachmady, Tahir Ghani +4 more | 2018-09-25 |
| 10084058 | Quantum well MOSFET channels having lattice mismatch with metal source/drains, and conformal regrowth source/drains | Prashant Majhi, Mantu K. Hudait, Jack T. Kavalieros, Ravi Pillarisetty, Gilbert Dewey +2 more | 2018-09-25 |
| 10074718 | Non-planar semiconductor device having group III-V material active region with multi-dielectric gate stack | Gilbert Dewey, Ravi Pillarisetty, Benjamin Chu-Kung, Niloy Mukherjee | 2018-09-11 |
| 10056456 | N-channel gallium nitride transistors | Han Wui Then, Sansaptak Dasgupta, Seung Hoon Sung, Sanaz K. Gardner, Robert S. Chau | 2018-08-21 |
| 10050015 | Multi-device flexible electronics system on a chip (SOC) process integration | Ravi Pillarisetty, Sansaptak Dasgupta, Niloy Mukherjee, Brian S. Doyle, Han Wui Then | 2018-08-14 |
| 10032911 | Wide band gap transistor on non-native semiconductor substrate | Han Wui Then, Robert S. Chau, Sansaptak Dasgupta, Benjamin Chu-Kung, Seung Hoon Sung +2 more | 2018-07-24 |
| 10026845 | Deep gate-all-around semiconductor device having germanium or group III-V active layer | Ravi Pillarisetty, Willy Rachmady, Van H. Le, Seung Hoon Sung, Jessica S. Kachian +5 more | 2018-07-17 |
| 10020371 | Contact techniques and configurations for reducing parasitic resistance in nanowire transistors | Ravi Pillarisetty, Benjamin Chu-Kung, Willy Rachmady, Van H. Le, Gilbert Dewey +3 more | 2018-07-10 |
| 9991172 | Forming arsenide-based complementary logic on a single substrate | Mantu K. Hudait, Jack T. Kavalieros, Suman Datta | 2018-06-05 |
| 9972686 | Germanium tin channel transistors | Ravi Pillarisetty, Van H. Le, Willy Rachmady, Roza Kotlyar, Han Wui Then +4 more | 2018-05-15 |
| 9947780 | High electron mobility transistor (HEMT) and method of fabrication | Han Wui Then, Robert S. Chau, Benjamin Chu-Kung, Gilbert Dewey, Jack T. Kavalieros +3 more | 2018-04-17 |