KB

Kuljit S. Bains

IN Intel: 192 patents #60 of 30,777Top 1%
QU Qualcomm: 6 patents #2,896 of 12,104Top 25%
TR Tahoe Research: 3 patents #2 of 215Top 1%
SS Sk Hynix Nand Product Solutions: 1 patents #82 of 148Top 60%
📍 Olympia, WA: #2 of 379 inventorsTop 1%
🗺 Washington: #50 of 76,902 inventorsTop 1%
Overall (All Time): #3,243 of 4,157,543Top 1%
203
Patents All Time

Issued Patents All Time

Showing 126–150 of 203 patents

Patent #TitleCo-InventorsDate
9030903 Method, apparatus and system for providing a memory refresh John B. Halbert, Suneeta Sah, Zvika Greenfield 2015-05-12
9032141 Row hammer monitoring based on stored row hammer threshold value John B. Halbert 2015-05-12
9009362 Variable-width command/address bus 2015-04-14
8972685 Method, apparatus and system for exchanging communications via a command/address bus James A. McCall 2015-03-03
8938573 Row hammer condition monitoring Zvika Greenfield, Theodore Z. Schoenborn, Christopher P. Mozak, John B. Halbert 2015-01-20
8909856 Fast exit from self-refresh state of a memory device 2014-12-09
8862973 Method and system for error management in a memory device David J. Zimmerman, Dennis W. Brzezinski, Michael W. Williams, John B. Halbert 2014-10-14
8806298 Reliability, availability, and serviceability in a memory device 2014-08-12
8775725 Memory device refresh commands on the fly 2014-07-08
8775991 Interchangeable connection arrays for double-sided DIMM placement Michael W. Leddige, John T. Sprietsma 2014-07-08
8738993 Memory device on the fly CRC mode 2014-05-27
8661284 Method and system to improve the operations of a registered memory module James W. Alexander, Howard S. David 2014-02-25
8649229 Memory module bus termination voltage (VTT) regulation and management George Vergis 2014-02-11
8595428 Memory controller functionalities to support data swizzling Joseph H. Salmon 2013-11-26
8533538 Method and apparatus for training a memory signal via an error signal of a memory Santanu Chaudhuri, Joseph H. Salmon 2013-09-10
8495330 Method and apparatus for interfacing with heterogeneous dual in-line memory modules George Vergis, Joe Salmon 2013-07-23
8484410 Method to stagger self refreshes George Vergis 2013-07-09
8468433 Optimizing the size of memory devices used for error correction code storage Joe Salmon 2013-06-18
8458507 Bus frequency adjustment circuitry for use in a dynamic random access memory device Joe Salmon 2013-06-04
8438515 Interchangeable connection arrays for double-sided DIMM placement Michael W. Leddige, John T. Sprietsma 2013-05-07
8411523 Reduced current requirements for DRAM self-refresh modes via staggered refresh operations of subsets of memory banks or rows 2013-04-02
8392796 Reliability, availability, and serviceability solution for memory technology Joseph H. Salmon 2013-03-05
8392650 Fast exit from self-refresh state of a memory device 2013-03-05
8386676 Systems, methods, and apparatuses for transmitting data mask bits to a memory device 2013-02-26
8385146 Memory throughput increase via fine granularity of precharge management John B. Halbert 2013-02-26