Issued Patents All Time
Showing 51–75 of 188 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 8896344 | Heterogeneous programmable device and configuration software adapted therefor | Valavan Manohararajah, David Galloway | 2014-11-25 |
| 8895981 | Multichip module with reroutable inter-die communication | — | 2014-11-25 |
| 8890567 | High speed testing of integrated circuits including resistive elements | — | 2014-11-18 |
| 8878567 | Omnibus logic element | James Schleicher, Richard Yuan, Bruce B. Pedersen, Sinan Kaptanoglu, Gregg William Baeckler +4 more | 2014-11-04 |
| 8866527 | Integrated circuits with hold time avoidance circuitry | — | 2014-10-21 |
| 8863059 | Integrated circuit device configuration methods adapted to account for retiming | Ryan Fung, Valavan Manohararajah | 2014-10-14 |
| 8839172 | Specification of latency in programmable device configuration | Valavan Manohararajah, David Galloway | 2014-09-16 |
| 8832627 | Automatic asynchronous signal pipelining | Mark Bourgeault, Ryan Fung | 2014-09-09 |
| 8806259 | Time division multiplexed multiport memory implemented using single-port memory elements | — | 2014-08-12 |
| 8804295 | Configurable multi-gate switch circuitry | — | 2014-08-12 |
| 8788550 | Structures for LUT-based arithmetic in PLDs | Ketan Padalia, David Cashman, Andy L. Lee, Jay Schleicher, Jinyong Yuan +1 more | 2014-07-22 |
| 8751551 | Modular digital signal processing circuitry with optionally usable, dedicated connections between modules of the circuitry | Keone Streicher, Martin Langhammer, Yi-Wen Lin, Wai-Bor Leung, Volker Mauer +3 more | 2014-06-10 |
| 8732646 | PLD architecture for flexible placement of IP function blocks | Andy L. Lee, Cameron McClintock, Brian Johnson, Richard G. Cliff, Srinivas T. Reddy +3 more | 2014-05-20 |
| 8732635 | Apparatus and methods for power management in integrated circuits | Christopher F. Lane, Sarathy Sribhashyam, Srinivas Perisetty, Tim Vanderhoek, Vaughn Betz +2 more | 2014-05-20 |
| 8713496 | Specification of latency in programmable device configuration | Valavan Manohararajah, David Galloway | 2014-04-29 |
| 8677298 | Programmable device configuration methods adapted to account for retiming | Valavan Manohararajah, David Galloway, Ryan Fung | 2014-03-18 |
| 8661386 | Method and apparatus for performing timing analysis with current source driver models using interpolated device characteristics | Zahir Parpia | 2014-02-25 |
| 8645885 | Specification of multithreading in programmable device configuration | Valavan Manohararajah, David Galloway | 2014-02-04 |
| 8640067 | Method and apparatus for implementing a field programmable gate array clock skew | Michael D. Hutton | 2014-01-28 |
| 8620977 | Modular digital signal processing circuitry with optionally usable, dedicated connections between modules of the circuitry | Keone Streicher, Martin Langhammer, Yi-Wen Lin, Wai-Bor Leung, Volker Mauer +3 more | 2013-12-31 |
| 8593174 | Omnibus logic element for packing or fracturing | James Schleicher, Richard Yuan, Bruce B. Pedersen, Sinan Kaptanoglu, Gregg William Baeckler +4 more | 2013-11-26 |
| 8581624 | Integrated circuits with multi-stage logic regions | David Cashman, Valavan Manohararajah | 2013-11-12 |
| 8558599 | Method and apparatus for reducing power spikes caused by clock networks | Ryan Fung | 2013-10-15 |
| 8560927 | Memory error detection circuitry | Kostas Pagiamtzis | 2013-10-15 |
| 8549055 | Modular digital signal processing circuitry with optionally usable, dedicated connections between modules of the circuitry | Keone Streicher, Martin Langhammer, Yi-Wen Lin, Wai-Bor Leung, Volker Mauer +3 more | 2013-10-01 |